6.10.15 QSPI
The Quad Serial Peripheral Interface (QSPI™) module is a kind of Serial Peripheral Interface (SPI) module which allows single, dual or quad read and write access to external flash devices. This module has a memory mapped register interface, which provides a direct memory interface for accessing data from external flash devices, simplifying software requirements.
The QSPI module has the following features:
- Memory-Mapped Direct mode of operation for performing flash data transfers and executing code from flash memory.
- Software triggered 'indirect' mode of operation for performing low latency and non-processor intensive flash data transfers.
- Local SRAM to reduce bus overhead and buffer flash data during indirect transfers.
- Set of software accessible flash control registers to perform any flash command, including data transfers up to 8-bytes at a time.
- Supports any device clock frequency, including frequencies of 96 MHz (QSPI mode 0 only).
- Supports XIP (Execute in Place), also referred to as continuous mode.
- Supports single, dual or quad I/O instructions.
- Supports 16/32/64 byte cacheline wrap accesses.
- Supports ECC for its internal SRAM buffer.
- Programmable device sizes.
- Programmable write protected regions to block system writes from taking effect.
- Programmable delays between transactions.
- Legacy mode allowing software direct access to low level transmit and receive FIFOs bypassing the higher layer processes.
- Independent reference clock to decouple bus clock from SPI clock – allows slow system clocks.
- Serial clock with programmable polarity.
- Programmable baud rate generator to generate QSPI clocks.
- Features included to improve high speed read data capture mechanism.
- Option to use adapted clocks to further improve read data capturing.
- Programmable interrupt generation.
- Up to four external chip selects.
- Supports Little-endian operation only.
For more information, see section Quad Serial Peripheral Interface (QSPI) in chapter Peripherals of the Device TRM.