SNOSBI1C November 2009 – June 2015
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | CS | I | Chip Select |
2 | RD | I | Read |
3 | WR | I | Write |
4 | CLK IN | I | External Clock input or use internal clock gen with external RC elements |
5 | INTR | O | Interrupt request |
6 | VIN(+) | I | Differential analog input+ |
7 | VIN(–) | I | Differential analog input– |
8 | A GND | I | Analog ground pin |
9 | VREF/2 | I | Reference voltage input for adjustment to correct full scale reading |
10 | D GND | I | Digital ground pin |
11 | DB7 | O | Data bit 7 |
12 | DB6 | O | Data bit 6 |
13 | DB5 | O | Data bit 5 |
14 | DB4 | O | Data bit 4 |
15 | DB3 | O | Data bit 3 |
16 | DB2 | O | Data bit 2 |
17 | DB1 | O | Data bit 1 |
18 | DB0 (LSB) | O | Data bit 0 |
19 | CLK R | I | RC timing resistor input pin for internal clock gen |
20 | VCC (or VREF) | I | +5V supply voltage, also upper reference input to the ladder |