ZHCSOS8A October   2021  – October 2024 ADC09DJ1300 , ADC09QJ1300 , ADC09SJ1300

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: DC Specifications
    6. 5.6  Electrical Characteristics: Power Consumption
    7. 5.7  Electrical Characteristics: AC Specifications
    8. 5.8  Timing Requirements
    9. 5.9  Switching Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Comparison
      2. 6.3.2 Analog Input
        1. 6.3.2.1 Analog Input Protection
        2. 6.3.2.2 Full-Scale Voltage (VFS) Adjustment
        3. 6.3.2.3 Analog Input Offset Adjust
      3. 6.3.3 ADC Core
        1. 6.3.3.1 ADC Core Calibration
        2. 6.3.3.2 ADC Theory of Operation
        3. 6.3.3.3 Analog Reference Voltage
        4. 6.3.3.4 ADC Over-range Detection
        5. 6.3.3.5 Code Error Rate (CER)
        6. 6.3.3.6 Temperature Monitoring Diode
        7. 6.3.3.7 Timestamp
      4. 6.3.4 Clocking
        1. 6.3.4.1 Converter PLL (C-PLL) for Sampling Clock Generation
        2. 6.3.4.2 LVDS Clock Outputs (PLLREFO±, TRIGOUT±)
        3. 6.3.4.3 Optional CMOS Clock Outputs (ORC, ORD)
        4. 6.3.4.4 SYSREF for JESD204C Subclass-1 Deterministic Latency
          1. 6.3.4.4.1 SYSREF Capture for Multi-Device Synchronization and Deterministic Latency
          2. 6.3.4.4.2 SYSREF Position Detector and Sampling Position Selection (SYSREF Windowing)
        5. 6.3.4.5 JESD204C Interface
          1. 6.3.4.5.1  Transport Layer
          2. 6.3.4.5.2  Scrambler
          3. 6.3.4.5.3  Link Layer
          4. 6.3.4.5.4  8B/10B Link Layer
            1. 6.3.4.5.4.1 Data Encoding (8B/10B)
            2. 6.3.4.5.4.2 Multiframes and the Local Multiframe Clock (LMFC)
            3. 6.3.4.5.4.3 Code Group Synchronization (CGS)
            4. 6.3.4.5.4.4 Initial Lane Alignment Sequence (ILAS)
            5. 6.3.4.5.4.5 Frame and Multiframe Monitoring
          5. 6.3.4.5.5  64B/66B Link Layer
            1. 6.3.4.5.5.1 64B/66B Encoding
            2. 6.3.4.5.5.2 Multiblocks, Extended Multiblocks and the Local Extended Multiblock Clock (LEMC)
              1. 6.3.4.5.5.2.1 Block, Multiblock and Extended Multiblock Alignment using Sync Header
                1. 6.3.4.5.5.2.1.1 Cyclic Redundancy Check (CRC) Mode
                2. 6.3.4.5.5.2.1.2 Forward Error Correction (FEC) Mode
            3. 6.3.4.5.5.3 Initial Lane Alignment
            4. 6.3.4.5.5.4 Block, Multiblock and Extended Multiblock Alignment Monitoring
          6. 6.3.4.5.6  Physical Layer
            1. 6.3.4.5.6.1 SerDes Pre-Emphasis
          7. 6.3.4.5.7  JESD204C Enable
          8. 6.3.4.5.8  Multi-Device Synchronization and Deterministic Latency
          9. 6.3.4.5.9  Operation in Subclass 0 Systems
          10. 6.3.4.5.10 Alarm Monitoring
            1. 6.3.4.5.10.1 Clock Upset Detection
            2. 6.3.4.5.10.2 FIFO Upset Detection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Low Power Mode and High Performance Mode
      2. 6.4.2 JESD204C Modes
        1. 6.4.2.1 JESD204C Transport Layer Data Formats
        2. 6.4.2.2 64B/66B Sync Header Stream Configuration
        3. 6.4.2.3 Redundant Data Mode (Alternate Lanes)
      3. 6.4.3 Power-Down Modes
      4. 6.4.4 Test Modes
        1. 6.4.4.1  Serializer Test-Mode Details
        2. 6.4.4.2  PRBS Test Modes
        3. 6.4.4.3  Clock Pattern Mode
        4. 6.4.4.4  Ramp Test Mode
        5. 6.4.4.5  Short and Long Transport Test Mode
          1. 6.4.4.5.1 Short Transport Test Pattern
        6. 6.4.4.6  D21.5 Test Mode
        7. 6.4.4.7  K28.5 Test Mode
        8. 6.4.4.8  Repeated ILA Test Mode
        9. 6.4.4.9  Modified RPAT Test Mode
        10. 6.4.4.10 Calibration Modes and Trimming
          1. 6.4.4.10.1 Foreground Calibration Mode
          2. 6.4.4.10.2 Background Calibration Mode
          3. 6.4.4.10.3 Low-Power Background Calibration (LPBG) Mode
        11. 6.4.4.11 Offset Calibration
        12. 6.4.4.12 Trimming
    5. 6.5 Programming
      1. 6.5.1 Using the Serial Interface
      2. 6.5.2 SCS
      3. 6.5.3 SCLK
      4. 6.5.4 SDI
      5. 6.5.5 SDO
      6. 6.5.6 Streaming Mode
    6. 6.6 SPI_Register_Map Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Light Detection and Ranging (LiDAR) Digitizer
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Analog Front-End Requirements
          2. 7.2.1.2.2 Calculating Clock and SerDes Frequencies
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Initialization Set Up
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Sequencing
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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5.10 Typical Characteristics

Typical values at 25°C, AIN = -1 dBFS, FIN = 347 MHz, FS = 1300 MSPS, High power mode, FG calibration, JMODE 0, CPLL off, CPLLREF = 50 MHz and VA11Q and VCLK11 noise suppression on when CPLL on, nominal supply voltages, unless otherwise noted. SNR results exclude DC, HD2 to HD9; SINAD, ENOB, and SFDR results exclude DC.

ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 DNL vs Code
Figure 5-1 DNL vs Code
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Input Fullscale vs Input Frequency
Relative to 0Hz
Figure 5-3 Input Fullscale vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 497 MHz and -1 dBFS
High Power Mode
Figure 5-5 Single Tone FFT at 497 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 1497 MHz and -1 dBFS
High Power Mode
Figure 5-7 Single Tone FFT at 1497 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 2697 MHz and -1 dBFS
High Power Mode
Figure 5-9 Single Tone FFT at 2697 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 99.997 MHz and -1 dBFS
FS = 1000MSPS, Low Power Mode
Figure 5-11 Single Tone FFT at 99.997 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 1197 MHz and -1 dBFS
FS = 1000MSPS, Low Power Mode
Figure 5-13 Single Tone FFT at 1197 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Frequency
Figure 5-15 SFDR vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Input Frequency
Figure 5-17 SINAD vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2 vs Input Frequency
Figure 5-19 HD2 vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Sample Rate
Figure 5-21 SFDR vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Sample Rate
Figure 5-23 SINAD vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Sample Rate
FS = 1000MSPS, Low Power Mode
Figure 5-25 SFDR vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Sample Rate
FS = 1000MSPS, Low Power Mode
Figure 5-27 SINAD vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Amplitude
Figure 5-29 SFDR vs Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Amplitude
FS = 1000MSPS, FIN = 100MHz,Low Power Mode
Figure 5-31 SFDR vs Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Clock Amplitude
Figure 5-33 SFDR vs Clock Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR, SFDR and SINAD vs Temperature
FIN = 997 MHz
Figure 5-35 SNR, SFDR and SINAD vs Temperature
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Temperature and Calibration Mode
FIN = 997 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-37 SINAD vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Temperature and Calibration Mode
FIN = 997 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-39 SFDR vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Temperature and Calibration Mode
Low Power Mode, FIN = 347 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-41 SINAD vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Temperature and Calibration Mode
Low Power Mode, FIN = 347 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-43 SFDR vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2, HD3 and Worst non-HD Spur vs Supply Voltage
FIN = 347 MHz
Figure 5-45 HD2, HD3 and Worst non-HD Spur vs Supply Voltage
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2, HD3 and Worst non-HD Spur vs Supply Voltage
Low Power Mode, FIN = 347 MHz, FS = 1000MSPS
Figure 5-47 HD2, HD3 and Worst non-HD Spur vs Supply Voltage
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 348 MHz Center
10 MHz Tone Spacing
Figure 5-49 Two Tone FFT at 348 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 998 MHz Center
10 MHz Tone Spacing
Figure 5-51 Two Tone FFT at 998 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 2698 MHz Center
10 MHz Tone Spacing
Figure 5-53 Two Tone FFT at 2698 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 348 MHz Center
Low Power Mode, FS = 1000 MSPS, 10 MHz Tone Spacing
Figure 5-55 Two Tone FFT at 348 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 IMD3 vs Input Frequency
10 MHz Tone Spacing
Figure 5-57 IMD3 vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Crosstalk to Channel A vs FIN
Figure 5-59 Crosstalk to Channel A vs FIN
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Reference Clock Frequency
CPLL On, FIN = 397MHz
Figure 5-61 SFDR vs Reference Clock Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Frequency and CPLL
FS = 1300MSPS, High Power Mode
Figure 5-63 SNR vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Frequency and CPLL
FS = 1000MSPS
Figure 5-65 SFDR vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Input Frequency and CPLL
FS = 1000MSPS
Figure 5-67 SINAD vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-69 SNR vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-71 SINAD vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2 vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-73 HD2 vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-75 SNR vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SINAD vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-77 SINAD vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2 vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-79 HD2 vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 5-81 Quad Channel, Power Dissipation vs FS for JMODES 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation vs FS for JMODES 8 - 11
Figure 5-83 Quad Channel, Power Dissipation vs FS for JMODES 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVA19 vs FS
Independent of JMODE
Figure 5-85 Quad Channel, IVA19 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVD11 vs FS and JMODE 0 - 3
independent of power mode
Figure 5-87 Quad Channel, IVD11 vs FS and JMODE 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVD11 vs FS and JMODE 8 - 11
independent of power mode
Figure 5-89 Quad Channel, IVD11 vs FS and JMODE 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 5-91 Dual Channel, Power Dissipation vs FS for JMODES 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation vs FS for JMODES 8 - 11
Figure 5-93 Dual Channel, Power Dissipation vs FS for JMODES 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVA19 vs FS
Independent of JMODE
Figure 5-95 Dual Channel, IVA19 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 vs FS and JMODE 0 - 3
independent of power mode
Figure 5-97 Dual Channel, IVD11 vs FS and JMODE 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 vs FS and JMODE 8 - 11
independent of power mode
Figure 5-99 Dual Channel, IVD11 vs FS and JMODE 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation vs FS for JMODES 0 - 3
Figure 5-101 Single Channel, Power Dissipation vs FS for JMODES 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation vs FS for JMODES 8 - 11
Figure 5-103 Single Channel, Power Dissipation vs FS for JMODES 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVA19 vs FS
Independent of JMODE
Figure 5-105 Single Channel, IVA19 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVD11 vs FS and JMODE 0 - 3
independent of power mode
Figure 5-107 Single Channel, IVD11 vs FS and JMODE 0 - 3
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVD11 vs FS and JMODE 8 - 11
independent of power mode
Figure 5-109 Single Channel, IVD11 vs FS and JMODE 8 - 11
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-111 Quad Channel, Power Dissipation Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-113 Single Channel, Power Dissipation Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVA19 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-115 Dual Channel, IVA19 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVA11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-117 Quad Channel, IVA11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVA11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-119 Single Channel, IVA11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-121 Dual Channel, IVD11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation vs Temperature
Figure 5-123 Quad Channel, Power Dissipation vs Temperature
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation vs Temperature
Figure 5-125 Single Channel, Power Dissipation vs Temperature
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Background Calibration Core Transition (AC Signal)
Figure 5-127 Background Calibration Core Transition (AC Signal)
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Background Calibration Core Transition (DC Signal)
Figure 5-129 Background Calibration Core Transition (DC Signal)
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 INL vs Code
Figure 5-2 INL vs Code
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 347 MHz and -1 dBFS
High Power Mode
Figure 5-4 Single Tone FFT at 347 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 997 MHz and -1 dBFS
High Power Mode
Figure 5-6 Single Tone FFT at 997 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 1797 MHz and -1 dBFS
High Power Mode
Figure 5-8 Single Tone FFT at 1797 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 3497 MHz and -1 dBFS
High Power Mode
Figure 5-10 Single Tone FFT at 3497 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 347 MHz and -1 dBFS
FS = 1000MSPS, Low Power Mode
Figure 5-12 Single Tone FFT at 347 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Tone FFT at 1797 MHz and -1 dBFS
FS = 1000MSPS, Low Power Mode
Figure 5-14 Single Tone FFT at 1797 MHz and -1 dBFS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Frequency
Figure 5-16 SNR vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Input Frequency
Figure 5-18 ENOB vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD3 vs Input Frequency
Figure 5-20 HD3 vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Sample Rate
Figure 5-22 SNR vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Sample Rate
Figure 5-24 ENOB vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Sample Rate
FS = 1000MSPS, Low Power Mode
Figure 5-26 SNR vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Sample Rate
FS = 1000MSPS, Low Power Mode
Figure 5-28 ENOB vs Sample Rate
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Amplitude
Figure 5-30 SNR vs Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Amplitude
FS = 1000MSPS, FIN = 100MHz, Low Power Mode
Figure 5-32 SNR vs Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Clock Amplitude
Figure 5-34 SNR vs Clock Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD2, HD3 and worst non-HD Spur vs Temperature
FIN = 997 MHz
Figure 5-36 HD2, HD3 and worst non-HD Spur vs Temperature
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Temperature and Calibration Mode
FIN = 997 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-38 ENOB vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Temperature and Calibration Mode
Low Power Mode, FIN = 347 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-40 SNR vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Temperature and Calibration Mode
Low Power Mode, FIN = 347 MHz, FG25°C means calibration at 25°C and held across temperature
Figure 5-42 ENOB vs Temperature and Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR, SFDR and SINAD vs Supply Voltage
FIN = 347 MHz
Figure 5-44 SNR, SFDR and SINAD vs Supply Voltage
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR, SFDR and SINAD vs Supply Voltage
Low Power Mode, FIN = 347 MHz, FS = 1000MSPS
Figure 5-46 SNR, SFDR and SINAD vs Supply Voltage
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 95.07 MHz Center
10 MHz Tone Spacing
Figure 5-48 Two Tone FFT at 95.07 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 498 MHz Center
10 MHz Tone Spacing
Figure 5-50 Two Tone FFT at 498 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 1798 MHz Center
10 MHz Tone Spacing
Figure 5-52 Two Tone FFT at 1798 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 95.07 MHz Center
Low Power Mode, FS = 1000 MSPS, 10 MHz Tone Spacing
Figure 5-54 Two Tone FFT at 95.07 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Two Tone FFT at 998 MHz Center
Low Power Mode, FS = 1000 MSPS, 10 MHz Tone Spacing
Figure 5-56 Two Tone FFT at 998 MHz Center
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 IMD3 vs Input Frequency
Low Power Mode, FS = 1000 MSPS, 10 MHz Tone Spacing
Figure 5-58 IMD3 vs Input Frequency
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Crosstalk to Channel B vs FIN
Figure 5-60 Crosstalk to Channel B vs FIN
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Frequency and CPLL
FS = 1300MSPS, High Power Mode
Figure 5-62 SFDR vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Input Frequency and CPLL
FS = 1300MSPS, High Power Mode
Figure 5-64 ENOB vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SNR vs Input Frequency and CPLL
FS = 1000MSPS
Figure 5-66 SNR vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Input Frequency and CPLL
FS = 1000MSPS
Figure 5-68 ENOB vs Input Frequency and CPLL
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-70 SFDR vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-72 ENOB vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD3 vs Input Frequency, CPLL and Input Amplitude
FS = 1300MSPS, High Power Mode
Figure 5-74 HD3 vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 SFDR vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-76 SFDR vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 ENOB vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-78 ENOB vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 HD3 vs Input Frequency, CPLL and Input Amplitude
FS = 1000MSPS, Low Power Mode
Figure 5-80 HD3 vs Input Frequency, CPLL and Input Amplitude
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation vs FS for JMODES 4 - 7
Figure 5-82 Quad Channel, Power Dissipation vs FS for JMODES 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, Power Dissipation vs FS for JMODES 12 - 15
Figure 5-84 Quad Channel, Power Dissipation vs FS for JMODES 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVA11 vs FS
Independent of JMODE
Figure 5-86 Quad Channel, IVA11 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVD11 vs FS and JMODE 4 - 7
independent of power mode
Figure 5-88 Quad Channel, IVD11 vs FS and JMODE 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVD11 vs FS and JMODE 12 - 15
independent of power mode
Figure 5-90 Quad Channel, IVD11 vs FS and JMODE 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation vs FS for JMODES 4 - 7
Figure 5-92 Dual Channel, Power Dissipation vs FS for JMODES 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation vs FS for JMODES 12 - 15
Figure 5-94 Dual Channel, Power Dissipation vs FS for JMODES 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVA11 vs FS
Independent of JMODE
Figure 5-96 Dual Channel, IVA11 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 vs FS and JMODE 4 - 7
independent of power mode
Figure 5-98 Dual Channel, IVD11 vs FS and JMODE 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 vs FS and JMODE 12 - 15
independent of power mode
Figure 5-100 Dual Channel, IVD11 vs FS and JMODE 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation vs FS for JMODES 4 - 7
Figure 5-102 Single Channel, Power Dissipation vs FS for JMODES 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, Power Dissipation vs FS for JMODES 12 - 15
Figure 5-104 Single Channel, Power Dissipation vs FS for JMODES 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVA11 vs FS
Independent of JMODE
Figure 5-106 Single Channel, IVA11 vs FS
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVD11 vs FS and JMODE 4 - 7
independent of power mode
Figure 5-108 Single Channel, IVD11 vs FS and JMODE 4 - 7
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVD11 vs FS and JMODE 12 - 15
independent of power mode
Figure 5-110 Single Channel, IVD11 vs FS and JMODE 12 - 15
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-112 Dual Channel, Power Dissipation Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVA19 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-114 Quad Channel, IVA19 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Single Channel, IVA19 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-116 Single Channel, IVA19 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVA11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-118 Dual Channel, IVA11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Quad Channel, IVD11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-120 Quad Channel, IVD11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, IVD11 Change with Calibration Mode
Difference to foreground calibration, JMODE independent
Figure 5-122 Dual Channel, IVD11 Change with Calibration Mode
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Dual Channel, Power Dissipation vs Temperature
Figure 5-124 Dual Channel, Power Dissipation vs Temperature
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Background Calibration Core Transition (midscale voltage)
Figure 5-126 Background Calibration Core Transition (midscale voltage)
ADC09QJ1300 ADC09DJ1300 ADC09SJ1300 Background Calibration Core Transition (AC Signal Zoomed)
Figure 5-128 Background Calibration Core Transition (AC Signal Zoomed)
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