ZHCSON8A July 2021 – October 2024 ADC09DJ800-Q1 , ADC09QJ800-Q1 , ADC09SJ800-Q1
PRODUCTION DATA
ADC core calibration is required to optimize the analog performance of the ADC cores. Calibration must be repeated when operating conditions change significantly, namely temperature, in order to maintain optimal performance. The device has a built-in calibration routine that can be run as a foreground operation or a background operation. Foreground operation requires ADC downtime, where the ADC is no longer sampling the input signal, to complete the process. Background calibration can be used to overcome this limitation and allow constant operation of the ADC. See the Calibration Modes and Trimming section for detailed information on each mode.