SNAS466G February 2009 – December 2016 ADC10D1000QML-SP
PRODUCTION DATA.
Source all supply buses for the ADC from a common linear voltage regulator. This ensures that all power buses to the ADC are turned on and off simultaneously. This single source is split into individual sections of the power plane, with individual decoupling and connection to the different power supply buses of the ADC. Due to the low voltage but relatively high supply current requirement, the optimal solution may be to use a switching regulator to provide an intermediate low voltage, which is then regulated down to the final ADC supply voltage by a linear regulator. Refer to the documentation provided for the ADC10D1000RB for additional details on specific regulators that TI recommends for this configuration.
Provide power for the ADC through a broad plane, which is located on one layer adjacent to the ground plane(s). Placing the power and ground planes on adjacent layers provides low impedance decoupling of the ADC supplies, especially at higher frequencies. The output of a linear regulator must feed into the power plane through a low impedance multi-via connection. Split the power plane into individual power peninsulas near the ADC. Each peninsula should feed a particular power bus on the ADC, with decoupling for that power bus connecting the peninsula to the ground plane near each power/ground pin pair. Using this technique can be difficult on many printed circuit CAD tools. To work around this, 0-Ω resistors can be used to connect the power source net to the individual nets for the different ADC power buses. As a final step, the 0-Ω resistors can be removed, and the plane and peninsulas can be connected manually after all other error checking is completed.
The general recommendation is to have one 100-nF capacitor for each power/ground pin pair. The capacitors must be surface mount multi-layer ceramic chip capacitors similar to Presidio SR0402X7R104KENG5.
Grounding must be done using continuous full ground planes to minimize the impedance for all ground return paths, and provide the shortest possible image/return path for all signal traces.
The ADC10D1000RB uses continuous ground planes (except where clear areas are needed to provide appropriate impedance management for specific signals), see Figure 49. Power is provided on one plane, with the 1.9-V ADC supply being split into multiple zones or peninsulas for the specific power buses of the ADC. Decoupling capacitors are connected between these power bus peninsulas and the adjacent power planes using vias. The capacitors are located as close to the individual power/ground pin pairs of the ADC as possible. In most cases, this means the capacitors are located on the opposite side of the PCB to the ADC.