SNAS483F February   2010  – August 2015 ADC128D818

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Electrical Characteristics
    6. 7.6 AC Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Voltage (V+)
      2. 8.3.2 Voltage References (VREF)
      3. 8.3.3 Analog Inputs (IN0 - IN7)
        1. 8.3.3.1 Single-Ended Input
        2. 8.3.3.2 Pseudo-Differential Input
    4. 8.4 Device Functional Modes
      1. 8.4.1 Modes of Operation
    5. 8.5 Programming
      1. 8.5.1 Interface
        1. 8.5.1.1 Serial Bus Address
        2. 8.5.1.2 Time-out
          1. 8.5.1.2.1 Example Writes and Reads
    6. 8.6 Register Maps
      1. 8.6.1  ADC128D818 Internal Registers
      2. 8.6.2  Configuration Register — Address 00h
      3. 8.6.3  Interrupt Status Register — Address 01h
      4. 8.6.4  Interrupt Mask Register — Address 03h
      5. 8.6.5  Conversion Rate Register — Address 07h
      6. 8.6.6  Channel Disable Register — Address 08h
      7. 8.6.7  One-Shot Register — Address 09h
      8. 8.6.8  Deep Shutdown Register — Address 0Ah
      9. 8.6.9  Advanced Configuration Register — Address 0Bh
      10. 8.6.10 Busy Status Register — Address 0Ch
      11. 8.6.11 Channel Readings Registers — Addresses 20h - 27h
      12. 8.6.12 Limit Registers — Addresses 2Ah - 39h
      13. 8.6.13 Manufacturer ID Register — Address 3Eh
      14. 8.6.14 Revision ID Register — Addresses 3Fh
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Digital Output (DOUT)
      2. 9.1.2 Temperature Measurement System
        1. 9.1.2.1 Temperature Limits
      3. 9.1.3 Interrupt Structure
        1. 9.1.3.1 Interrupt Output (INT)
        2. 9.1.3.2 Interrupt Clearing
        3. 9.1.3.3 Temperature Interrupt
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Management
        2. 9.2.2.2 Using the ADC128D818
          1. 9.2.2.2.1 Quick Start
          2. 9.2.2.2.2 Poweron Reset (POR)
          3. 9.2.2.2.3 Configuration Register (address 00h)
          4. 9.2.2.2.4 Interrupt Status Register (address 01h)
          5. 9.2.2.2.5 Interrupt Mask Register (address 03h)
          6. 9.2.2.2.6 Conversion Rate Register (address 07h)
          7. 9.2.2.2.7 One-Shot Register (address 09h)
          8. 9.2.2.2.8 Deep Shutdown Register (address 0Ah)
          9. 9.2.2.2.9 Channel Readings Registers (addresses 20h - 27h)
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
      1. 9.3.1 General Voltage Monitoring
      2. 9.3.2 Voltage Monitoring for Power Supplies
      3. 9.3.3 Temperature Sensors
      4. 9.3.4 Bridge Sensors
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The ADC128D818 provides 8 analog inputs, a temperature sensor, a delta-sigma ADC, an external or internal VREF option, and WATCHDOG registers on a single chip. An I2C Serial Bus interface is also provided. The ADC128D818 can perform voltage and temperature monitoring for a variety of systems.

The ADC128D818 continuously converts the voltage input to 12-bit resolution with an internal VREF of 0.625-mV LSb (Least Significant bit) weighting, yielding input range of 0 V to 2.56 V. There is also an external VREF option that ranges from 1.25 V to V+. The analog inputs are intended to be connected to several power supplies present in a variety of systems. Eight inputs can be configured for single-ended and/or pseudo-differential channels. Temperature can be converted to a 9-bit two's complement word with resolutions of 0.5°C per LSb.

The ADC128D818 provides a number of internal registers. These registers are summarized in Table 19.

The ADC128D818 supports Standard Mode (Sm, 100 kbps) and Fast Mode (Fm, 400 kbps) I2C interface modes of operation. ADC128D818 includes an analog filter on the I2C digital control lines that allows improved noise immunity. The device also supports TIME-OUT reset function on SDA and SCL to prevent I2C bus lock-up. Two tri-level address pins allow up to 9 devices on a single I2C bus.

At start-up, ADC128D818 cycles through each measurement in sequence and continuously loops through the sequence based on the Conversion Rate Register (address 07h) setting. Each measured value is compared to values stored in the Limit Registers (addresses 2Ah - 39h). When the measured value violates the programmed limit, the ADC128D818 will set a corresponding interrupt bit in the Interrupt Status Registers (address 01h). An interrupt output pin, INT, is also available and fully programmable.

8.2 Functional Block Diagram

ADC128D818 30096303.gif

8.3 Feature Description

8.3.1 Supply Voltage (V+)

The ADC128D818 operates with a supply voltage, V+, that has a range between 3 V to 5.5 V. Take care to bypass this pin with a parallel combination of 1-µF (electrolytic or tantalum) capacitor and 0.1-µF (ceramic) bypass capacitor.

8.3.2 Voltage References (VREF)

The reference voltage (VREF) sets the analog input range. The ADC128D818 has two options for setting VREF. The first option is to use the internal VREF, which is equal to 2.56 V. The second option is to source VREF externally through pin 1 of ADC128D818. In this case, the external VREF will operate in the range of 1.25 V to V+. The default VREF selection is the internal VREF. If the external VREF is preferred, use the Advanced Configuration Register — Address 0Bh to change this setting.

VREF source must have a low output impedance and needs to be bypassed with a minimum capacitor value of 0.1 µF. A larger capacitor value of 1 µF placed in parallel with the 0.1 µF is preferred. VREF of the ADC128D818, like all ADC converters, does not reject noise or voltage variations. Keep this in mind if VREF is derived from the power supply. Any noise and/or ripple from the supply that is not rejected by the external reference circuitry will appear in the digital results. The use of a reference source is recommended. The LM4040 and LM4050 shunt reference families as well as the LM4120 and LM4140 series reference families are excellent choices for a reference source.

8.3.3 Analog Inputs (IN0 - IN7)

The ADC128D818 allows up to 8 single-ended inputs or 4 pseudo-differential inputs as selected by the modes of operation. The input types are described in the next subsections.

8.3.3.1 Single-Ended Input

ADC128D818 allows a maximum of 8 single-ended inputs, where the source's voltage is connected to INx (0 ≤ x ≤ 7). The source’s ground must be connected to ADC128D818’s GND pin. In theory, INx can be of any value between 0V and (VREF-3LSb/2), where LSb = VREF/212.

To use the device single-endedly, refer to the Modes of Operation section and to bits [2:1] of the Advanced Configuration Register — Address 0Bh. Figure 24 shows the appropriate configuration for a single-ended connection.

ADC128D818 30096331.gifFigure 24. Single-Ended Configuration

8.3.3.2 Pseudo-Differential Input

Pseudo-differential mode is defined as the positive input voltage applied differentially to the ADC128D818, as shown in Figure 25. The input that is digitized is (ΔVIN = IN+ - IN–), where (IN+ - IN–) is (IN0-IN1), (IN3-IN2), (IN4-IN5), or (IN7-IN6). Be aware of this input configuration because the order is swapped. In theory, ΔVIN can be of any value between 0 V and (VREF – 3LSb/2), where LSb = VREF/212.

By using this pseudo-differential input, small signals common to both inputs are rejected. Thus, operation with a pseudo-differential input signal will provide better performance than with a single-ended input. See Modes of Operation for more information.

ADC128D818 30096332.gifFigure 25. Pseudo-Differential Configuration

8.4 Device Functional Modes

8.4.1 Modes of Operation

ADC128D818 allows 4 modes of operation, as summarized in the following table. Set the desired mode of operation using the Advanced Configuration Register — Address 0Bh, bits [2:1]).

Table 1. Modes of Operation

CH. MODE 0 MODE 1 MODE 2 MODE 3
1 IN0 IN0 IN0 (+) and IN1 (-) IN0
2 IN1 IN1 IN3 (+) and IN2 (-) IN1
3 IN2 IN2 IN4 (+) and IN5 (-) IN2
4 IN3 IN3 IN7 (+) and IN6 (-) IN3
5 IN4 IN4 IN4 (+) and IN5 (-)
6 IN5 IN5 IN7 (+) and IN6 (-)
7 IN6 IN6
8 nc(1) IN7
Local Temp Yes No Yes Yes
(1) nc = No Connect

8.5 Programming

8.5.1 Interface

The Serial Bus control lines include the SDA (serial data), SCL (serial clock), and A0-A1 (Serial Bus Address) pins. The ADC128D818 can only operate as a slave. The SCL line only controls the serial interface, and all of other clock functions within ADC128D818 are done with a separate asynchronous internal clock.

When the Serial Bus Interface is used, a write will always consists of the ADC128D818 Serial Bus Address byte, followed by the Register Address byte, then the Data byte. Figure 26 and Figure 27 are two examples showing how to write to the ADC128D818.

There are two cases for a read:

  1. If the Register Address is known to be at the desired address, simply read the ADC128D818 with the Serial Bus Address byte, followed by the Data byte read from the ADC128D818. Examples of this type of read can be seen in Figure 28 and Figure 29.
  2. If the Register Address value is unknown, write to the ADC128D818 with the Serial Bus Address byte, followed by the desired Register Address byte. Then restart the Serial Communication with a Read consisting of the Serial Bus Address byte, followed by the Data byte read from the ADC128D818. See Figure 30 and Figure 31 for examples of this type of read.

The Serial Bus Address can be found in the next section, and the Register Address can be found in Register Maps. For more information on the I2C Interface, refer to NXP's "I2C-Bus Specification and User Manual", rev. 03.

8.5.1.1 Serial Bus Address

There are nine different configurations for the ADC128D818 Serial Bus Address, thus nine devices are allowed on a single I2C bus. Examples to set each address bit low, high, or to midscale can be found in System Examples. The Serial Bus Address can be set as follows:

Table 2. Serial Bus Address Table

A1 A0 SERIAL BUS ADDRESS
[A6][A5][A4]...[A0]
SERIAL BUS ADDRESS (HEX)
LOW LOW 001_1101b 1Dh
LOW MID 001_1110b 1Eh
LOW HIGH 001_1111b 1Fh
MID LOW 010_1101b 2Dh
MID MID 010_1110b 2Eh
MID HIGH 010_1111b 2Fh
HIGH LOW 011_0101b 35h
HIGH MID 011_0110b 36h
HIGH HIGH 011_0111b 37h

8.5.1.2 Time-out

The ADC128D818 I2C state machine resets to its idle state if either SCL or SDA is held low for longer than 35 ms. This feature also ensures that ADC128D818 will automatically release SDA after driving it low continuously for 25 to 35 ms, hence preventing I2C bus lock-up. The TIME-OUT feature should not be used when the device is operating in deep shutdown mode.

8.5.1.2.1 Example Writes and Reads

ADC128D818 30096309.gifFigure 26. Serial Bus Interface Write Example 1 - Internal Address Register Set Only
ADC128D818 30096308.gifFigure 27. Serial Bus Interface Write Example 2 - Internal Address Register Set With Data Byte Write
ADC128D818 30096310.gifFigure 28. Serial Bus Interface Read Example 1 - Single Byte Read With Preset Internal Address Register
ADC128D818 30096322.gifFigure 29. Serial Bus Interface Read Example 2 - Double Byte Read With Preset Internal Address Register
ADC128D818 30096324.gifFigure 30. Serial Bus Interface Read Example 3 - Single Byte Read With Internal Address Set Using a Repeat Start
ADC128D818 30096323.gifFigure 31. Serial Bus Interface Read Example 4 - Double Byte Read With Internal Address Set Using a Repeat Start

8.6 Register Maps

8.6.1 ADC128D818 Internal Registers

Table 3. ADC128D818 Internal Registers

REGISTER NAME READ/WRITE REGISTER ADDRESS (HEX) DEFAULT VALUE [7:0] REGISTER DESCRIPTION REGISTER FORMAT
Configuration Register R/W 00h 0000_1000 Provides control and configuration 8-bit
Interrupt Status Register R 01h 0000_0000 Provides status of each WATCHDOG limit or interrupt event 8-bit
Interrupt Mask Register R/W 03h 0000_0000 Masks the interrupt status from propagating to INT 8-bit
Conversion Rate Register R/W 07h 0000_0000 Controls the conversion rate 8-bit
Channel Disable Register R/W 08h 0000_0000 Disables conversion for each voltage or temperature channel 8-bit
One-Shot Register W 09h 0000_0000 Initiates a single conversion of all enabled channels 8-bit
Deep Shutdown Register R/W 0Ah 0000_0000 Enables deep shutdown mode 8-bit
Advanced Configuration Register R/W 0Bh 0000_0000 Selects internal or external VREF and modes of operation 8-bit
Busy Status Register R 0Ch 0000_0010 Reflects ADC128D818 'Busy' and 'Not Ready' statuses 8-bit
Channel Readings Registers R 20h - 27h - - - Report the channels (voltage or temperature) readings 16-bit
Limit Registers R/W 2Ah - 39h - - - Set the limits for the voltage and temperature channels 8-bit
Manufacturer ID Register R 3Eh 0000_0001 Reports the manufacturer's ID 8-bit
Revision ID Register R 3Fh 0000_1001 Reports the revision's ID 8-bit

8.6.2 Configuration Register — Address 00h

Default Value [7:0] = 0000_1000 binary

Table 4. Address 00h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
ALL MODES
0 Start Read/Write 0: ADC128D818 in shutdown mode
1: Enable startup of monitoring operations
1 INT_Enable Read/Write 1: Enable the interrupt output pin, INT
2 Reserved Read Only
3 INT_Clear Read/Write 1: Clear the interrupt output pin, INT, without affecting the contents of Interrupt Status Registers. When this bit is set high, the device stops the round-robin monitoring loop.
4 Reserved Read Only
5 Reserved Read Only
6 Reserved Read Only
7 Initialization Read/Write 1: Restore default values to the following registers: Configuration, Interrupt Status, Interrupt Mask, Conversion Rate, Channel Disable, One-Shot, Deep Shutdown, Advanced Configuration, Busy Status, Channel Readings, Limit, Manufacturer ID, Revision ID. This bit clears itself

8.6.3 Interrupt Status Register — Address 01h

Default Value [7:0] = 0000_0000 binary

Table 5. Address 01h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
MODE 0
0 IN0 Error Read Only 1: A High or Low limit has been exceeded
1 IN1 Error Read Only 1: A High or Low limit has been exceeded
2 IN2 Error Read Only 1: A High or Low limit has been exceeded
3 IN3 Error Read Only 1: A High or Low limit has been exceeded
4 IN4 Error Read Only 1: A High or Low limit has been exceeded
5 IN5 Error Read Only 1: A High or Low limit has been exceeded
6 IN6 Error Read Only 1: A High or Low limit has been exceeded
7 Hot Temperature Error Read Only 1: A High limit has been exceeded
MODE 1
0 IN0 Error Read Only 1: A High or Low limit has been exceeded
1 IN1 Error Read Only 1: A High or Low limit has been exceeded
2 IN2 Error Read Only 1: A High or Low limit has been exceeded
3 IN3 Error Read Only 1: A High or Low limit has been exceeded
4 IN4 Error Read Only 1: A High or Low limit has been exceeded
5 IN5 Error Read Only 1: A High or Low limit has been exceeded
6 IN6 Error Read Only 1: A High or Low limit has been exceeded
7 IN7 Error Read Only 1: A High or Low limit has been exceeded
MODE 2
0 IN0(+) and IN1(-) Error Read Only 1: A High or Low limit has been exceeded
1 IN3(+) and IN2(-) Error Read Only 1: A High or Low limit has been exceeded
2 IN4(+) and IN5(-) Error Read Only 1: A High or Low limit has been exceeded
3 IN7(+) and IN6(-) Error Read Only 1: A High or Low limit has been exceeded
4 Reserved Read Only
5 Reserved Read Only
6 Reserved Read Only
7 Hot Temperature Error Read Only 1: A High limit has been exceeded
MODE 3
0 IN0 Error Read Only 1: A High or Low limit has been exceeded
1 IN1 Error Read Only 1: A High or Low limit has been exceeded
2 IN2 Error Read Only 1: A High or Low limit has been exceeded
3 IN3 Error Read Only 1: A High or Low limit has been exceeded
4 IN4(+) and IN5(-) Error Read Only 1: A High or Low limit has been exceeded
5 IN7(+) and IN6(-) Error Read Only 1: A High or Low limit has been exceeded
6 Reserved Read Only
7 Hot Temperature Error Read Only 1: A High limit has been exceeded

8.6.4 Interrupt Mask Register — Address 03h

Default Value [7:0] = 0000_0000 binary

Table 6. Address 03h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
MODE 0
0 IN0 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
1 IN1 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
2 IN2 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
3 IN3 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
4 IN4 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
5 IN5 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
6 IN6 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
7 Temperature Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
MODE 1
0 IN0 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
1 IN1 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
2 IN2 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
3 IN3 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
4 IN4 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
5 IN5 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
6 IN6 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
7 IN7 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
MODE 2
0 IN0(+) and IN1(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
1 IN3(+) and IN2(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
2 IN4(+) and IN5(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
3 IN7(+) and IN6(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
4 Reserved Read Only
5 Reserved Read Only
6 Reserved Read Only
7 Temperature Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
MODE 3
0 IN0 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
1 IN1 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
2 IN2 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
3 IN3 Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
4 IN4(+) and IN5(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
5 IN7(+) and IN6(-) Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT
6 Reserved Read Only
7 Temperature Mask Read/Write 1: Mask the corresponding interrupt status from propagating to the interrupt output pin, INT

8.6.5 Conversion Rate Register — Address 07h

Default Value [7:0] = 0000_0000 binary

Table 7. Address 07h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
0 Conversion Rate Read/Write Controls the conversion rate:
0: Low Power Conversion Mode
1: Continuous Conversion Mode
Note: This register must only be programmed when the device is in shutdown mode, that is, when the 'START' bit of the 'Configuration Register' (address 00h) = 0
1–7 Reserved Read Only

8.6.6 Channel Disable Register — Address 08h

Default Value [7:0] = 0000_0000 binary

  • This register must only be programmed when the device is in shutdown mode, that is, when the ‘START’ bit of the “Configuration Register’ (address 00h) = 0.
  • Whenever this register is programmed, all of the values in the Channel Reading Registers and Interrupt Status Registers will return to their default values.

Table 8. Address 08h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
MODE 0
0 IN0 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
1 IN1 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
2 IN2 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed
3 IN3 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
4 IN4 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
5 IN5 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
6 IN6 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
7 Temperature Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
MODE 1
0 IN0 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
1 IN1 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
2 IN2 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
3 IN3 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
4 IN4 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
5 IN5 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
6 IN6 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
7 IN7 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
MODE 2
0 IN0(+) and IN1(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
1 IN3(+) and IN2(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
2 IN4(+) and IN5(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
3 IN7(+) and IN6(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
4 Reserved Read Only
5 Reserved Read Only
6 Reserved Read Only
7 Temperature Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
MODE 3
0 IN0 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
1 IN1 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
2 IN2 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
3 IN3 Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
4 IN4(+) and IN5(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
5 IN7(+) and IN6(-) Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.
6 Reserved Read Only
7 Temperature Disable Read/Write 1: Conversions are skipped and disabled, value register reading will be 0, and error events will be suppressed.

8.6.7 One-Shot Register — Address 09h

Default Value [7:0] = 0000_0000 binary

Table 9. Address 09h

BIT BIT NAME READ/WRITE BIT DESCRIPTION
0 One-Shot Write Only 1: Initiate a single conversion and comparison cycle when the device is in shutdown mode or deep shutdown mode, after which the device returns to the respective mode that it was in
1–7 Reserved Read Only

8.6.8 Deep Shutdown Register — Address 0Ah

Default Value [7:0] = 0000_0000 binary

Table 10. Address 0Ah

BIT BIT NAME READ/WRITE BIT DESCRIPTION
0 Deep Shutdown Enable Read/Write 1: When 'START' = 0 (address 00h, bit 0), setting this bit high will place the device in deep shutdown mode
1–7 Reserved Read Only

8.6.9 Advanced Configuration Register — Address 0Bh

Default Value [7:0] = 0000_0000 binary

Note: Whenever the Advanced Configuration Register is programmed, all of the values in the Channel Reading Registers and Interrupt Status Registers will return to their default values.

Table 11. Address 0Bh

BIT BIT NAME READ/WRITE BIT DESCRIPTION
0 External Reference Enable Read/Write 0: Selects the 2.56V internal VREF
1: Selects the variable external VREF
1 Mode Select [0] Read/Write Mode Select [1] Mode Select [0] Mode
0 0 Mode 0
0 1 Mode 1
1 0 Mode 2
2 Mode Select [1] 1 1 Mode 3
3–7 Reserved Read Only

8.6.10 Busy Status Register — Address 0Ch

Default Value [7:0] = 0000_0010 binary

Table 12. Address 0Ch

BIT BIT NAME READ/WRITE BIT DESCRIPTION
0 Busy Read Only 1: ADC128D818 is converting
1 Not Ready Read Only 1: Waiting for the power-up sequence to end
2–7 Reserved Read Only

8.6.11 Channel Readings Registers — Addresses 20h – 27h

ADDRESS REGISTER NAME READ/WRITE REGISTER DESCRIPTION
MODE 0
20h IN0 Reading Read Only Reading for this perspective channel
21h IN1 Reading Read Only Reading for this perspective channel
22h IN2 Reading Read Only Reading for this perspective channel
23h IN3 Reading Read Only Reading for this perspective channel
24h IN4 Reading Read Only Reading for this perspective channel
25h IN5 Reading Read Only Reading for this perspective channel
26h IN6 Reading Read Only Reading for this perspective channel
27h Temperature Reading Read Only Reading for this perspective channel
MODE 1
20h IN0 Reading Read Only Reading for this perspective channel
21h IN1 Reading Read Only Reading for this perspective channel
22h IN2 Reading Read Only Reading for this perspective channel
23h IN3 Reading Read Only Reading for this perspective channel
24h IN4 Reading Read Only Reading for this perspective channel
25h IN5 Reading Read Only Reading for this perspective channel
26h IN6 Reading Read Only Reading for this perspective channel
27h IN7 Reading Read Only Reading for this perspective channel
MODE 2
20h IN0(+) and IN1(-) Reading Read Only Reading for this perspective channel
21h IN3(+) and IN2(-) Reading Read Only Reading for this perspective channel
22h IN4(+) and IN5(-) Reading Read Only Reading for this perspective channel
23h IN7(+) and IN6(-) Reading Read Only Reading for this perspective channel
24h Reserved Read Only
25h Reserved Read Only
26h Reserved Read Only
27h Temperature Reading Read Only Reading for this perspective channel
MODE 3
20h IN0 Reading Read Only Reading for this perspective channel
21h IN1 Reading Read Only Reading for this perspective channel
22h IN2 Reading Read Only Reading for this perspective channel
23h IN3 Reading Read Only Reading for this perspective channel
24h IN4(+) and IN5(-) Reading Read Only Reading for this perspective channel
25h IN7(+) and IN6(-) Reading Read Only Reading for this perspective channel
26h Reserved Read Only
27h Temperature Reading Read Only Reading for this perspective channel

8.6.12 Limit Registers — Addresses 2Ah – 39h

Table 13. Addresses 2Ah – 39h

ADDRESS REGISTER NAME READ/WRITE REGISTER DESCRIPTION
MODE 0
2Ah IN0 High Limit Read/Write High Limit
2Bh IN0 Low Limit Read/Write Low Limit
2Ch IN1 High Limit Read/Write High Limit
2Dh IN1 Low Limit Read/Write Low Limit
2Eh IN2 High Limit Read/Write High Limit
2Fh IN2 Low Limit Read/Write Low Limit
30h IN3 High Limit Read/Write High Limit
31h IN3 Low Limit Read/Write Low Limit
32h IN4 High Limit Read/Write High Limit
33h IN4 Low Limit Read/Write Low Limit
34h IN5 High Limit Read/Write High Limit
35h IN5 Low Limit Read/Write Low Limit
36h IN6 High Limit Read/Write High Limit
37h IN6 Low Limit Read/Write Low Limit
38h Temperature High Limit Read/Write High Limit
39h Temperature Hysteresis Limit Read/Write Hysteresis Limit
MODE 1
2Ah IN0 High Limit Read/Write High Limit
2Bh IN0 Low Limit Read/Write Low Limit
2Ch IN1 High Limit Read/Write High Limit
2Dh IN1 Low Limit Read/Write Low Limit
2Eh IN2 High Limit Read/Write High Limit
2Fh IN2 Low Limit Read/Write Low Limit
30h IN3 High Limit Read/Write High Limit
31h IN3 Low Limit Read/Write Low Limit
32h IN4 High Limit Read/Write High Limit
33h IN4 Low Limit Read/Write Low Limit
34h IN5 High Limit Read/Write High Limit
35h IN5 Low Limit Read/Write Low Limit
36h IN6 High Limit Read/Write High Limit
37h IN6 Low Limit Read/Write Low Limit
38h IN7 High Limit Read/Write High Limit
39h IN7 Low Limit Read/Write Low Limit
MODE 2
2Ah IN0(+) and IN1(-) High Limit Read/Write High Limit
2Bh IN0(+) and IN1(-) Low Limit Read/Write Low Limit
2Ch IN3(+) and IN2(-) High Limit Read/Write High Limit
2Dh IN3(+) and IN2(-) Low Limit Read/Write Low Limit
2Eh IN4(+) and IN5(-) High Limit Read/Write High Limit
2Fh IN4(+) and IN5(-) Low Limit Read/Write Low Limit
30h IN7(+) and IN6(-) High Limit Read/Write High Limit
31h IN7(+) and IN6(-) Low Limit Read/Write Low Limit
32h Reserved Read Only
33h Reserved Read Only
34h Reserved Read Only
35h Reserved Read Only
36h Reserved Read Only
37h Reserved Read Only
38h Temperature High Limit Read/Write High Limit
39h Temperature Hysteresis Limit Read/Write Hysteresis Limit
MODE 3
2Ah IN0 High Limit Read/Write High Limit
2Bh IN0 Low Limit Read/Write Low Limit
2Ch IN1 High Limit Read/Write High Limit
2Dh IN1 Low Limit Read/Write Low Limit
2Eh IN2 High Limit Read/Write High Limit
2Fh IN2 Low Limit Read/Write Low Limit
30h IN3 High Limit Read/Write High Limit
31h IN3 Low Limit Read/Write Low Limit
32h IN4(+) and IN5(-) High Limit Read/Write High Limit
33h IN4(+) and IN5(-) Low Limit Read/Write Low Limit
34h IN7(+) and IN6(-) High Limit Read/Write High Limit
35h IN7(+) and IN6(-) Low Limit Read/Write Low Limit
36h Reserved Read Only
37h Reserved Read Only
38h Temperature High Limit Read/Write High Limit
39h Temperature Hysteresis Limit Read/Write Hysteresis Limit

8.6.13 Manufacturer ID Register — Address 3Eh

Default Value [7:0] = 0000_0001 binary

Table 14. Address 3Eh

ADDRESS REGISTER NAME READ/WRITE REGISTER DESCRIPTION
3Eh Manufacturer ID Read Only Manufacturer's ID always defaults to 0000_0001.

8.6.14 Revision ID Register — Addresses 3Fh

Default Value [7:0] = 0000_1001 binary

Table 15. Addresses 3Fh

ADDRESS REGISTER NAME READ/WRITE REGISTER DESCRIPTION
3Fh Revision ID Read Only Revision's ID always defaults to 0000_1001.