SNAS480N May   2010  – August 2015 ADC12D1000 , ADC12D1600

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Static Converter
    6. 6.6  Electrical Characteristics: Dynamic Converter
    7. 6.7  Electrical Characteristics: Analog Input/Output and Reference
    8. 6.8  Electrical Characteristics: I-Channel To Q-Channel
    9. 6.9  Electrical Characteristics: Converter and Sampling Clock
    10. 6.10 Electrical Characteristics: Autosync Feature
    11. 6.11 Electrical Characteristics: Digital Control and Output Pin
    12. 6.12 Electrical Characteristics: Power Supply
    13. 6.13 Electrical Characteristics: AC
    14. 6.14 Timing Requirements: Serial Port Interface
    15. 6.15 Timing Requirements: Calibration
    16. 6.16 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Control and Adjust
        1. 7.3.1.1 AC-DC-Coupled Mode
        2. 7.3.1.2 Input Full-Scale Range Adjust
        3. 7.3.1.3 Input Offset Adjust
        4. 7.3.1.4 DES Timing Adjust
        5. 7.3.1.5 Sampling Clock Phase Adjust
      2. 7.3.2 Output Control and Adjust
        1. 7.3.2.1 DDR Clock Phase
        2. 7.3.2.2 LVDS Output Differential Voltage
        3. 7.3.2.3 LVDS Output Common-Mode Voltage
        4. 7.3.2.4 Output Formatting
        5. 7.3.2.5 Test Pattern Mode
        6. 7.3.2.6 Time Stamp
      3. 7.3.3 Calibration Feature
        1. 7.3.3.1 Calibration Control Pins and Bits
        2. 7.3.3.2 How to Execute a Calibration
        3. 7.3.3.3 Power-On Calibration
        4. 7.3.3.4 On-Command Calibration
        5. 7.3.3.5 Calibration Adjust
        6. 7.3.3.6 Read/Write Calibration Settings
        7. 7.3.3.7 Calibration and Power-Down
        8. 7.3.3.8 Calibration and the Digital Outputs
      4. 7.3.4 Power Down
    4. 7.4 Device Functional Modes
      1. 7.4.1 DES/Non-DES Mode
      2. 7.4.2 Demux/Non-Demux Mode
    5. 7.5 Programming
      1. 7.5.1 Control Modes
        1. 7.5.1.1 Non-Extended Control Mode
          1. 7.5.1.1.1  Dual Edge Sampling Pin (DES)
          2. 7.5.1.1.2  Non-Demultiplexed Mode Pin (NDM)
          3. 7.5.1.1.3  Dual Data Rate Phase Pin (DDRPH)
          4. 7.5.1.1.4  Calibration Pin (CAL)
          5. 7.5.1.1.5  Calibration Delay Pin (CALDLY)
          6. 7.5.1.1.6  Power-Down I-Channel Pin (PDI)
          7. 7.5.1.1.7  Power-Down Q-Channel Pin (PDQ)
          8. 7.5.1.1.8  Test Pattern Mode Pin (TPM)
          9. 7.5.1.1.9  Full-Scale Input Range Pin (FSR)
          10. 7.5.1.1.10 AC-DC-Coupled Mode Pin (VCMO)
          11. 7.5.1.1.11 LVDS Output Common-Mode Pin (VBG)
        2. 7.5.1.2 Extended Control Mode
          1. 7.5.1.2.1 The Serial Interface
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 The Analog Inputs
        1. 8.1.1.1 Acquiring the Input
        2. 8.1.1.2 Driving the ADC in DES Mode
        3. 8.1.1.3 FSR and the Reference Voltage
        4. 8.1.1.4 Out-of-Range Indication
        5. 8.1.1.5 Maximum Input Range
        6. 8.1.1.6 AC-Coupled Input Signals
        7. 8.1.1.7 DC-Coupled Input Signals
        8. 8.1.1.8 Single-Ended Input Signals
      2. 8.1.2 The Clock Inputs
        1. 8.1.2.1 CLK Coupling
        2. 8.1.2.2 CLK Frequency
        3. 8.1.2.3 CLK Level
        4. 8.1.2.4 CLK Duty Cycle
        5. 8.1.2.5 CLK Jitter
        6. 8.1.2.6 CLK Layout
      3. 8.1.3 The LVDS Outputs
        1. 8.1.3.1 Common-Mode and Differential Voltage
        2. 8.1.3.2 Output Data Rate
        3. 8.1.3.3 Terminating Unused LVDS Output Pins
      4. 8.1.4 Synchronizing Multiple ADC12D1x00s in a System
        1. 8.1.4.1 Autosync Feature
        2. 8.1.4.2 DCLK Reset Feature
      5. 8.1.5 Recommended System Chips
        1. 8.1.5.1 Temperature Sensor
        2. 8.1.5.2 Clocking Device
        3. 8.1.5.3 Amplifiers for the Analog Input
        4. 8.1.5.4 Balun Recommendations for Analog Input
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 System Power-On Considerations
      1. 9.1.1 Power-On, Configuration, and Calibration
      2. 9.1.2 Power-On and Data Clock (Dclk)
    2. 9.2 Supply Voltage
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Planes
      2. 10.1.2 Bypass Capacitors
      3. 10.1.3 Ground Planes
      4. 10.1.4 Power System Example
    2. 10.2 Layout Example
    3. 10.3 Thermal Management
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1 Specification Definitions
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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