The ADC12D1620 clock input is internally terminated with a trimmed 100-Ω resistor. The differential input clock line pair must have a characteristic impedance of 100 Ω and (when using a balun), be terminated at the clock source in that (100-Ω) characteristic impedance.

It is good practice to keep the ADC input clock line as short as possible, tightly coupled, keep it well away from any other signals, and treat it as a transmission line. Otherwise, other signals can introduce jitter into the input clock signal. Also, the clock signal can introduce noise into the analog path if it is not properly isolated.