Figure 6-1 Clocking in Non-LSPSM, 1:2 Demux, Non-DES Mode*

Figure 6-2 Clocking in Non-LSPSM, Non-Demux, Non-DES Mode*

Figure 6-3 Clocking in Non-LSPSM, 1:4 Demux DES Mode*

Figure 6-4 Clocking in Non-LSPSM, Non-Demux Mode DES Mode*

Figure 6-5 Clocking in LSPSM, 1:2 Demux Mode, Non-DES Mode*

Figure 6-6 Clocking in LSPSM, Non-Demux Mode, Non-DES Mode*

* The timing for Figure 6-1 through Figure 6-6 is shown for the one input only (I or Q). However, both I and Q inputs may be used. For this case, the I channel functions precisely the same as the Q channel, with VinI, DCLKI, DId, and DI instead of VinQ, DCLKQ, DQd, and DQ. Both I and Q channel use the same CLK.

Figure 6-7 Data Clock Reset Timing (Demux Mode)

Figure 6-8 On-Command Calibration Timing

Figure 6-9 Serial Interface Timing

Figure 6-10 Input / Output Transfer Characteristic