ZHCSQC0B June 2022 – March 2023 ADC12DJ5200-SP
PRODUCTION DATA
After converting the analog voltage to a digital value, the digitized sample can either be sent directly to the JESD204C interface block (DDC bypass) or sent to the digital down converter (DDC) block for frequency conversion and decimation. The DDC block can be used in both dual channel mode and single channel mode. Frequency conversion and decimation allows a specific frequency band to be selected and reduces the amount of data sent over the data interface. The DDC first mixes the desired band to complex baseband (0 Hz) by performing a complex mixing operating using the numerically-controlled oscillator (NCO) as the local oscillator (LO). The DDC then low-pass filters the baseband signal to remove unwanted frequency images and any signals that may potentially alias into the desired band. It finally decimates (down samples) the data to reduce the data rate. Note that the filtering and decimation operations are actually performed as a single operation in the device. The DDC is designed with sufficient precision such that the digital processing does not degrade the noise spectral density (NSD) performance of the ADC. Figure 7-8 illustrates the DDC block in the device in dual channel mode while Figure 7-9 shows the DDC block of the device in single channel mode. In dual channel mode, the input data for each DDC can be selected to come from either ADC channel A or ADC channel B by using the DIG_BIND_x SPI registers. Channel B has the same structure with the input data selected by DIG_BIND_B and the NCO selection mux controlled by pins NCOB[1:0] or through CSELB[1:0]. Only one DDC is available for use in single channel mode.