ZHCSOJ3B March 2023 – June 2024 ADC12DJ5200SE
PRODUCTION DATA
The analog inputs of the device contain an AC coupled balun to convert the single ended input to a differential signal for the ADCs. The input impedance is nominally 50 Ω. The ADCs have internal buffers to enable high input bandwidth and to isolate sampling capacitor glitch noise from the input circuit. The single ended input has no DC path. The device includes internal analog input protection to protect the ADC inputs during overranged input conditions; see the Analog Input Protection section. Figure 6-1 provides a simplified analog input model.
There is minimal degradation in analog input bandwidth when using single-channel mode versus dual-channel mode. Either analog input (INA or INB) can be used in single-channel mode, but INA is preferred for better performance. The desired input can be chosen using SINGLE_INPUT in the input mux control register. A calibration needs to be performed after switching the input mux for the changes to take effect. Further, two inputs can be used in single-channel mode to drive the interleaved ADCs separately using the SINGLE_INPUT register setting. This mode is called dual-input single-channel mode. Dual-input single-channel mode is equivalent to dual channel mode, except ADC B samples out-of-phase with ADC A (single-channel mode sample timing). This mode is available when a single-channel mode JMODE setting is chosen.