ZHCSI83C may 2018 – may 2023 ADC12DL3200
PRODUCTION DATA
The ADC12DL3200 is ideally suited for oscilloscope applications. The ability to tradeoff channel count and sampling speed allows designers to build flexible hardware to meet multiple needs. This flexibility saves development time and cost, allows hardware reuse for various projects, and enables software upgrade paths for additional functionality. The low code-error rate eliminates concerns about undesired time-domain glitches or sparkle codes. This rate makes the ADC12DL3200 a perfect fit for long-duration transient detection measurements and reduces the probability of false triggers. The input common-mode voltage of 0 V allows the driving amplifiers to use equal split power supplies that center the amplifier output common-mode voltage at 0 V and eliminates the need for common-mode voltage shifting before the ADC inputs. The high input bandwidth of the ADC12DL3200 simplifies the design of the driving amplifier circuit and antialiasing, low-pass filter. The use of dual-edge sampling (DES) in single-channel mode eliminates the need to change the clock frequency when switching between dual- and single-channel modes and simplifies synchronization by relaxing the setup and hold timing requirements of SYSREF. The tAD adjust circuit allows the user to time-align the sampling instances of multiple ADC12DL3200 devices.