8.4.1 Common Application Pitfalls

Driving the inputs (analog or digital) beyond the power supply rails. For device reliability, an input must not go more than 150 mV below the ground pins or 150 mV above the supply pins. Exceeding these limits even on a transient basis can cause faulty, or erratic, operation and can impair device reliability. High-speed digital circuits exhibiting undershoot that goes more than a volt below ground is common. To control overshoot, the impedance of high-speed lines must be controlled and these lines must be terminated in the characteristic impedance.

Care must be taken not to overdrive the inputs of the ADC12J1600 and ADC12J2700 devices. Such practice can lead to conversion inaccuracies and even to device damage.

Incorrect analog input common-mode voltage in the DC-coupled mode. As described in the The Analog Inputs and DC Coupled Input Usage sections, the input common-mode voltage (V_CMI) must remain the specified range as referenced to the VCMO pin, which has a variability with temperature that must also be tracked. Distortion performance is degraded if the input common mode voltage is outside the specified V_CMI range.

Using an inadequate amplifier to drive the analog input. Use care when choosing a high frequency amplifier to drive the ADC12J1600 and ADC12J2700 devices because many high-speed amplifiers have higher distortion than the ADC12J1600 and ADC12J2700 devices which results in overall system performance degradation.

Driving the clock input with an excessively high level signal. The ADC input clock level must not exceed the level described in the Recommended Operating Conditions table because the input offset can change if these levels are exceeded.

Inadequate input clock levels. As described in the Using the Serial Interface section, insufficient input clock levels can result in poor performance. Excessive input-clock levels can result in the introduction of an input offset.

Using a clock source with excessive jitter, using an excessively long input clock signal trace, or having other signals coupled to the input clock signal trace. These pitfalls cause the sampling interval to vary which causes excessive output noise and a reduction in SNR performance.

Failure to provide adequate heat removal. As described in the Thermal Management section, providing adequate heat removal is important to ensure device reliability. Adequate heat removal is primarily provided by properly connecting the thermal pad to the circuit board ground planes. Multiple vias should be arranged in a grid pattern in the area of the thermal pad. These vias will connect the topside pad to the internal ground planes and to a copper pour area on the opposite side of the printed circuit board.