米6体育平台手机版_好二三四

ZHCSPP4A june 2022 – july 2023 ADC12QJ1600-SP

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ALR|144

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zhcspp4a_oa

7.10 Typical Characteristics

Typical values at 25°C, A_IN = -1 dBFS, F_IN = 347 MHz, F_S = 1600 MSPS, High power mode, FG calibration, JMODE 0, C-PLL off, C-PLL_REF = 50 MHz and VA11Q and VCLK11 noise suppression on when C-PLL on, Quad Channel operation, nominal supply voltages, unless otherwise noted. SNR results exclude DC and HD2 to HD9; SINAD, ENOB, and SFDR results exclude DC.

Figure 7-1 DNL vs Code

Relative to 0Hz

Figure 7-3 Input Fullscale vs Frequency

High power mode, C-PLL on

Figure 7-5 Single Tone FFT at 347 MHz and -1 dBFS

High power mode

Figure 7-7 Single Tone FFT at 847 MHz and -1 dBFS

High power mode, C-PLL on, Noise suppression off

Figure 7-9 Single Tone FFT at 997 MHz and -1 dBFS

High power mode

Figure 7-11 Single Tone FFT at 3797 MHz and -1 dBFS

C-PLL on, Low power mode, F_S = 1000 MSPS

Figure 7-13 Single Tone FFT at 347 MHz and -1 dBFS

Low power mode, F_S = 1000 MSPS

Figure 7-15 Single Tone FFT at 2097 MHz and -1 dBFS

Figure 7-17 SFDR vs Input Frequency

Figure 7-19 SINAD vs Input Frequency

Figure 7-21 HD2 vs Input Frequency

Figure 7-23 SFDR vs Sample Rate

Figure 7-25 SINAD vs Sample Rate

Low power mode

Figure 7-27 SFDR vs Sample Rate

Low power mode

Figure 7-29 SFDR vs Sample Rate

Low power mode

Figure 7-31 ENOB vs Sample Rate

Figure 7-33 SNR vs A_IN

F_IN = 100MHz, Low power mode

Figure 7-35 SNR vs A_IN

Figure 7-37 SNR vs A_CLK

F_IN = 397MHz

Figure 7-39 SFDR vs F_REF and Suppression

Figure 7-41 SNR vs F_IN and C-PLL modes

Figure 7-43 ENOB vs F_IN and C-PLL modes

Low power mode

Figure 7-45 SNR vs F_IN and C-PLL modes

Low power mode

Figure 7-47 ENOB vs F_IN and C-PLL modes

Figure 7-49 SNR vs A_IN and C-PLL

Figure 7-51 ENOB vs A_IN and C-PLL

Figure 7-53 HD3 vs A_IN and C-PLL

Low power mode

Figure 7-55 SNR vs A_IN and C-PLL

Low power mode

Figure 7-57 ENOB vs A_IN and C-PLL

Low power mode

Figure 7-59 HD3 vs A_IN and C-PLL

All supplies changed together, high power mode

Figure 7-61 HD2, HD3 and Worst non-HD Spur vs Supply Voltage

All supplies changed together, low power mode, F_S = 1000MSPS

Figure 7-63 HD2, HD3 and Worst non-HD Spur vs Supply Voltage

Figure 7-65 SFDR vs Temperature

Figure 7-67 HD3 vs Temperature

10MHz tone spacing

Figure 7-69 Two Tone FFT at 498MHz

10MHz tone spacing

Figure 7-71 Two Tone FFT at 3498MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 7-73 Two Tone FFT at 1798 MHz

10MHz tone spacing

Figure 7-75 IMD3 vs F_IN

Figure 7-77 Crosstalk to Channel A vs F_IN

Low power background calibration mode

Figure 7-79 Quad Channel, Power Dissipation vs F_S and JMODES 0 - 3

Low power background calibration mode

Figure 7-81 Quad Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 7-83 Quad Channel, I_VA19 vs F_S

Low power background calibration mode, independent of power mode

Figure 7-85 Quad Channel, I_VD11 vs F_S and JMODE 0 - 3

Low power background calibration mode, independent of power mode

Figure 7-87 Quad Channel, I_VD11 vs F_S and JMODE 8 - 12

Low power background calibration mode

Figure 7-89 Dual Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 7-91 Dual Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 7-93 Dual Channel, I_VA19 vs F_S

Low power background calibration mode, independent of power mode

Figure 7-95 Dual Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode, independent of power mode

Figure 7-97 Dual Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode

Figure 7-99 Single Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 7-101 Single Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 7-103 Single Channel, I_VA19 vs F_S

Low power background calibration mode

Figure 7-105 Single Channel, I_VD11 vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 7-107 Single Channel, I_VD11 vs F_S and JMODE 8 - 12

Difference to lower power background calibration, JMODE independent

Figure 7-109 Quad Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-111 Single Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-113 Dual Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-115 Quad Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-117 Single Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-119 Dual Channel, I_VD11 Change with Calibration Mode

Figure 7-121 Quad Channel, Power Dissipation vs Temperature

Figure 7-123 Single Channel, Power Dissipation vs Temperature

BG Calibration, input voltage offset ~ 90% of fullscale, ADC_SRC_DLY=31, MUX_DLY=30

Figure 7-125 Background Calibration Core Transition (offset voltage)

BG Calibration, ADC_SRC_DLY=31, MUX_DLY=30, unzoomed region shown in previous plot

Figure 7-127 Background Calibration Core Transition (AC Signal Zoomed)

Figure 7-2 INL vs Code

High power mode

Figure 7-4 Single Tone FFT at 347 MHz and -1 dBFS

High power mode, C-PLL on, Noise suppression off

Figure 7-6 Single Tone FFT at 347 MHz and -1 dBFS

High power mode, C-PLL on

Figure 7-8 Single Tone FFT at 997 MHz and -1 dBFS

High power mode

Figure 7-10 Single Tone FFT at 1797 MHz and -1 dBFS

Low power mode, F_S = 1000 MSPS

Figure 7-12 Single Tone FFT at 347 MHz and -1 dBFS

Low power mode, F_S = 1000 MSPS

Figure 7-14 Single Tone FFT at 897 MHz and -1 dBFS

Low power mode, F_S = 1000 MSPS

Figure 7-16 Single Tone FFT at 3797 MHz and -1 dBFS

Figure 7-18 SNR vs Input Frequency

Figure 7-20 ENOB vs Input Frequency

Figure 7-22 HD3 vs Input Frequency

Figure 7-24 SNR vs Sample Rate

Figure 7-26 ENOB vs Sample Rate

Low power mode

Figure 7-28 SNR vs Sample Rate

Low power mode

Figure 7-30 SINAD vs Sample Rate

Figure 7-32 SFDR vs A_IN

F_IN = 100MHz, Low power mode

Figure 7-34 SFDR vs A_IN

Figure 7-36 SFDR vs A_CLK

F_IN = 397MHz

Figure 7-38 SNR vs F_REF and Suppression

Figure 7-40 SFDR vs F_IN and C-PLL modes

Figure 7-42 SINAD vs F_IN and C-PLL modes

Low power mode

Figure 7-44 SFDR vs F_IN and C-PLL modes

Low power mode

Figure 7-46 SINAD vs F_IN and C-PLL modes

Figure 7-48 SFDR vs A_IN and C-PLL

Figure 7-50 SINAD vs A_IN and C-PLL

Figure 7-52 HD2 vs A_IN and C-PLL

Low power mode

Figure 7-54 SFDR vs A_IN and C-PLL

Low power mode

Figure 7-56 SINAD vs A_IN and C-PLL

Low power mode

Figure 7-58 HD2 vs A_IN and C-PLL

All supplies changed together, high power mode

Figure 7-60 SNR, SFDR and SINAD vs Supply Voltage

All supplies changed together, low power mode, F_S = 1000MSPS

Figure 7-62 SNR, SFDR and SINAD vs Supply Voltages

Figure 7-64 SNR vs Temperature

Figure 7-66 HD2 vs Temperature

Worst spur is non-HD2 though -HD10 SDFR

Figure 7-68 Worst Spur vs Temperature

10MHz tone spacing

Figure 7-70 Two Tone FFT at 1798MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 7-72 Two Tone FFT at 348 MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 7-74 Two Tone FFT at 3498 MHz

10MHz tone spacing, Low power mode, 1000MSPS

Figure 7-76 IMD3 vs F_IN

Figure 7-78 Crosstalk to Channel B vs F_IN

Low power background calibration mode

Figure 7-80 Quad Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 7-82 Quad Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 7-84 Quad Channel, I_VA11 vs F_S

Low power background calibration mode, independent of power mode

Figure 7-86 Quad Channel, I_VD11 vs F_S and JMODE 4 - 7

Low power background calibration mode, independent of power mode

Figure 7-88 Quad Channel, I_VD11 vs F_S and JMODE 13 - 15

Low power background calibration mode

Figure 7-90 Dual Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 7-92 Dual Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 7-94 Dual Channel, I_VA11 vs F_S

Low power background calibration mode, independent of power mode

Figure 7-96 Dual Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode, independent of power mode

Figure 7-98 Dual Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode

Figure 7-100 Single Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 7-102 Single Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 7-104 Single Channel, I_VA11 vs F_S

Low power background calibration mode

Figure 7-106 Single Channel, I_VD11 vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 7-108 Single Channel, I_VD11 vs F_S and JMODE 13 - 15

Difference to lower power background calibration, JMODE independent

Figure 7-110 Dual Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-112 Quad Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-114 Single Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-116 Dual Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-118 Quad Channel, I_VD11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 7-120 Single Channel, I_VD11 Change with Calibration Mode

Figure 7-122 Dual Channel, Power Dissipation vs Temperature

BG Calibration, midscale input voltage, ADC_SRC_DLY=31, MUX_DLY=30

Figure 7-124 Background Calibration Core Transition (midscale voltage)

BG Calibration, ADC_SRC_DLY=31, MUX_DLY=30, zoomed region shown in next plot

Figure 7-126 Background Calibration Core Transition (AC Signal)

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