Typical values at 25°C, A_IN = -1 dBFS, F_IN = 347 MHz, F_S = 1600 MSPS, High power mode, FG calibration, JMODE 0, C-PLL off, C-PLL_REF = 50 MHz and VA11Q and VCLK11 noise suppression on when C-PLL on, Quad Channel operation, nominal supply voltages, unless otherwise noted. SNR results exclude DC and HD2 to HD9; SINAD, ENOB, and SFDR results exclude DC.

Figure 6-1 DNL vs Code

Relative to 0Hz

Figure 6-3 Input Fullscale vs Frequency

High power mode, C-PLL on

Figure 6-5 Single Tone FFT at 347 MHz and -1 dBFS

High power mode

Figure 6-7 Single Tone FFT at 847 MHz and -1 dBFS

High power mode, C-PLL on, Noise suppression off

Figure 6-9 Single Tone FFT at 997 MHz and -1 dBFS

High power mode

Figure 6-11 Single Tone FFT at 3797 MHz and -1 dBFS

C-PLL on, Low power mode, FS = 1000 MSPS

Figure 6-13 Single Tone FFT at 347 MHz and -1 dBFS

Low power mode, FS = 1000 MSPS

Figure 6-15 Single Tone FFT at 2097 MHz and -1 dBFS

Figure 6-17 SFDR vs Input Frequency

Figure 6-19 SINAD vs Input Frequency

Figure 6-21 HD2 vs Input Frequency

Figure 6-23 SFDR vs Sample Rate

Figure 6-25 SINAD vs Sample Rate

Low power mode

Figure 6-27 SFDR vs Sample Rate

Low power mode

Figure 6-29 SFDR vs Sample Rate

Low power mode

Figure 6-31 ENOB vs Sample Rate

Figure 6-33 SNR vs A_IN

FIN = 100MHz, Low power mode

Figure 6-35 SNR vs A_IN

Figure 6-37 SNR vs A_CLK

FIN = 397MHz

Figure 6-39 SFDR vs F_REF and Suppression

Figure 6-41 SNR vs F_IN and C-PLL modes

Figure 6-43 ENOB vs F_IN and C-PLL modes

Low power mode

Figure 6-45 SNR vs F_IN and C-PLL modes

Low power mode

Figure 6-47 ENOB vs F_IN and C-PLL modes

Figure 6-49 SNR vs A_IN and C-PLL

Figure 6-51 ENOB vs A_IN and C-PLL

Figure 6-53 HD3 vs A_IN and C-PLL

Low power mode

Figure 6-55 SNR vs A_IN and C-PLL

Low power mode

Figure 6-57 ENOB vs A_IN and C-PLL

Low power mode

Figure 6-59 HD3 vs A_IN and C-PLL

All supplies changed together, high power mode

Figure 6-61 HD2, HD3 and Worst non-HD Spur vs Supply Voltage

All supplies changed together, low power mode, FS = 1000MSPS

Figure 6-63 HD2, HD3 and Worst non-HD Spur vs Supply Voltage

Figure 6-65 SFDR vs Temperature

Figure 6-67 HD3 vs Temperature

10MHz tone spacing

Figure 6-69 Two Tone FFT at 498MHz

10MHz tone spacing

Figure 6-71 Two Tone FFT at 3498MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 6-73 Two Tone FFT at 1798 MHz

10MHz tone spacing

Figure 6-75 IMD3 vs F_IN

Figure 6-77 Crosstalk to Channel A vs F_IN

Low power background calibration mode

Figure 6-79 Quad Channel, Power Dissipation vs F_S and JMODES 0 - 3

Low power background calibration mode

Figure 6-81 Quad Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 6-83 Quad Channel, I_VA19 vs F_S

Low power background calibration mode, independent of power mode

Figure 6-85 Quad Channel, I_VD11 vs F_S and JMODE 0 - 3

Low power background calibration mode, independent of power mode

Figure 6-87 Quad Channel, I_VD11 vs F_S and JMODE 8 - 12

Low power background calibration mode

Figure 6-89 Dual Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 6-91 Dual Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 6-93 Dual Channel, I_VA19 vs F_S

Low power background calibration mode, independent of power mode

Figure 6-95 Dual Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode, independent of power mode

Figure 6-97 Dual Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode

Figure 6-99 Single Channel, Power Dissipation vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 6-101 Single Channel, Power Dissipation vs F_S and JMODE 8 - 12

Low power background calibration mode, independent of JMODE

Figure 6-103 Single Channel, I_VA19 vs F_S

Low power background calibration mode

Figure 6-105 Single Channel, I_VD11 vs F_S and JMODE 0 - 3

Low power background calibration mode

Figure 6-107 Single Channel, I_VD11 vs F_S and JMODE 8 - 12

Difference to lower power background calibration, JMODE independent

Figure 6-109 Quad Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-111 Single Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-113 Dual Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-115 Quad Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-117 Single Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-119 Dual Channel, I_VD11 Change with Calibration Mode

Figure 6-121 Quad Channel, Power Dissipation vs Temperature

Figure 6-123 Single Channel, Power Dissipation vs Temperature

BG Calibration, input voltage offset ~ 90% of fullscale, ADC_SRC_DLY=31, MUX_DLY=30

Figure 6-125 Background Calibration Core Transition (offset voltage)

BG Calibration, ADC_SRC_DLY=31, MUX_DLY=30, unzoomed region shown in previous plot

Figure 6-127 Background Calibration Core Transition (AC Signal Zoomed)

Figure 6-2 INL vs Code

High power mode

Figure 6-4 Single Tone FFT at 347 MHz and -1 dBFS

High power mode, C-PLL on, Noise suppression off

Figure 6-6 Single Tone FFT at 347 MHz and -1 dBFS

High power mode, C-PLL on

Figure 6-8 Single Tone FFT at 997 MHz and -1 dBFS

High power mode

Figure 6-10 Single Tone FFT at 1797 MHz and -1 dBFS

Low power mode, FS = 1000 MSPS

Figure 6-12 Single Tone FFT at 347 MHz and -1 dBFS

Low power mode, FS = 1000 MSPS

Figure 6-14 Single Tone FFT at 897 MHz and -1 dBFS

Low power mode, FS = 1000 MSPS

Figure 6-16 Single Tone FFT at 3797 MHz and -1 dBFS

Figure 6-18 SNR vs Input Frequency

Figure 6-20 ENOB vs Input Frequency

Figure 6-22 HD3 vs Input Frequency

Figure 6-24 SNR vs Sample Rate

Figure 6-26 ENOB vs Sample Rate

Low power mode

Figure 6-28 SNR vs Sample Rate

Low power mode

Figure 6-30 SINAD vs Sample Rate

Figure 6-32 SFDR vs A_IN

FIN = 100MHz, Low power mode

Figure 6-34 SFDR vs A_IN

Figure 6-36 SFDR vs A_CLK

FIN = 397MHz

Figure 6-38 SNR vs F_REF and Suppression

Figure 6-40 SFDR vs F_IN and C-PLL modes

Figure 6-42 SINAD vs F_IN and C-PLL modes

Low power mode

Figure 6-44 SFDR vs F_IN and C-PLL modes

Low power mode

Figure 6-46 SINAD vs F_IN and C-PLL modes

Figure 6-48 SFDR vs A_IN and C-PLL

Figure 6-50 SINAD vs A_IN and C-PLL

Figure 6-52 HD2 vs A_IN and C-PLL

Low power mode

Figure 6-54 SFDR vs A_IN and C-PLL

Low power mode

Figure 6-56 SINAD vs A_IN and C-PLL

Low power mode

Figure 6-58 HD2 vs A_IN and C-PLL

All supplies changed together, high power mode

Figure 6-60 SNR, SFDR and SINAD vs Supply Voltage

All supplies changed together, low power mode, FS = 1000MSPS

Figure 6-62 SNR, SFDR and SINAD vs Supply Voltages

Figure 6-64 SNR vs Temperature

Figure 6-66 HD2 vs Temperature

Worst spur is non-HD2 though -HD10 SDFR

Figure 6-68 Worst Spur vs Temperature

10MHz tone spacing

Figure 6-70 Two Tone FFT at 1798MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 6-72 Two Tone FFT at 348 MHz

10 MHz tone spacing, -7 dBFS per tone, Low power mode, 1000MSPS

Figure 6-74 Two Tone FFT at 3498 MHz

10MHz tone spacing, Low power mode, 1000MSPS

Figure 6-76 IMD3 vs F_IN

Figure 6-78 Crosstalk to Channel B vs F_IN

Low power background calibration mode

Figure 6-80 Quad Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 6-82 Quad Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 6-84 Quad Channel, I_VA11 vs F_S

Low power background calibration mode, independent of power mode

Figure 6-86 Quad Channel, I_VD11 vs F_S and JMODE 4 - 7

Low power background calibration mode, independent of power mode

Figure 6-88 Quad Channel, I_VD11 vs F_S and JMODE 13 - 15

Low power background calibration mode

Figure 6-90 Dual Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 6-92 Dual Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 6-94 Dual Channel, I_VA11 vs F_S

Low power background calibration mode, independent of power mode

Figure 6-96 Dual Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode, independent of power mode

Figure 6-98 Dual Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode

Figure 6-100 Single Channel, Power Dissipation vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 6-102 Single Channel, Power Dissipation vs F_S and JMODE 13 - 15

Low power background calibration mode, independent of JMODE

Figure 6-104 Single Channel, I_VA11 vs F_S

Low power background calibration mode

Figure 6-106 Single Channel, I_VD11 vs F_S and JMODE 4 - 7

Low power background calibration mode

Figure 6-108 Single Channel, I_VD11 vs F_S and JMODE 13 - 15

Difference to lower power background calibration, JMODE independent

Figure 6-110 Dual Channel, Power Dissipation Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-112 Quad Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-114 Single Channel, I_VA19 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-116 Dual Channel, I_VA11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-118 Quad Channel, I_VD11 Change with Calibration Mode

Difference to lower power background calibration, JMODE independent

Figure 6-120 Single Channel, I_VD11 Change with Calibration Mode

Figure 6-122 Dual Channel, Power Dissipation vs Temperature

BG Calibration, midscale input voltage, ADC_SRC_DLY=31, MUX_DLY=30

Figure 6-124 Background Calibration Core Transition (midscale voltage)

BG Calibration, ADC_SRC_DLY=31, MUX_DLY=30, zoomed region shown in next plot

Figure 6-126 Background Calibration Core Transition (AC Signal)