The power supply pins should be bypassed with a 0.1-µF capacitor and with a 100-pF ceramic chip capacitor close to each power pin. Leadless chip capacitors are preferred because they have low series inductance.

As is the case with all high-speed converters, the ADC14155 is sensitive to power supply noise. Accordingly, the noise on the analog supply pin should be kept below 100 mV_P-P.

The V_DR pin provides power for the output drivers and may be operated from a supply in the range of 1.6 V to 2 V. This enables lower power operation, reduces the noise coupling effects from the digital outputs to the analog circuitry and simplifies interfacing to lower voltage devices and systems. Note, however, that t_OD increases with reduced V_DR. A level translator may be required to interface the digital output signals of the ADC14155 to non-1.8-V CMOS devices.

Care should be taken to avoid extremely rapid power supply ramp up rate. Excessive power supply ramp up rate may damage the device.