8.3.1 Analog Inputs and Input Buffer

The ADC31JB68 analog signal inputs are designed to be driven differentially. The analog input pins have an internal analog buffer that drives the sampling circuit. As a result of the analog buffer and internal 200 Ω termination, the input pins present a time-constant impedance load to the external driving source which enables great flexibility in the external analog filter design or direct impedance match to the driver. The buffer also helps to isolate the external driving circuit from the internal switching charge transients of the sampling circuit which results in a more consistent SFDR performance across input frequencies.

The common-mode voltage of the signal inputs is internally biased to 1.6-V via the internal termination resistors which allows for AC coupling of the input drive network. Each input pin (VIN+, VIN–) must swing symmetrically between (V_CM + 0.425 V) and (V_CM – 0.425 V), resulting in a 1.7 V_PP (default) differential input swing.