ZHCSE48B September 2015 – January 2019 ADC31JB68
PRODUCTION DATA.
The ADC performance can be sensitive to amplitude and phase imbalance of the input differential signal. A front-end balance correction circuit is integrated to optimize the second-order distortion (HD2) performance of the ADC in the presence of an imbalanced input signal. 4-bit control of the phase mismatch and 3-bit control of the amplitude mismatch corrects the input mismatch before the input buffer. A simplified diagram of the amplitude and phase correction circuit at the ADC input is shown in Figure 30.
Amplitude correction is achieved by varying the single-ended termination resistance of each input while maintaining constant total differential resistance, thereby adjusting the amplitude at each input but leaving the differential swing constant. Phase correction, also considered capacitive balance correction, varies the capacitive load at the ADC input, thereby counter-acting the phase difference between the analog inputs while minimally affecting amplitude. This function is useful for correcting the balance of transformers or filters that drive the ADC analog inputs. Figure 31 shows the measured HD2 resulting from an example 300-MHz imbalanced input signal measured over the available amplitude and phase correction settings. Performance parameters in the Converter Performance Characteristics are characterized with the amplitude and phase correction settings in the default condition (no correction).