9.1.2.2 Analog Input Network Model

Matching the impedance of the driving circuit to the input impedance of the ADC can be important for a flat gain response through the network across frequency. In very broadband applications or lowpass applications, the ADC driving network must have very low impedance with a small termination resistor at the ADC input to maximize the bandwidth and minimize the bandwidth limitation posed by the capacitive load of the ADC input. In bandpass applications, a designer may either design the anti-aliasing filter to match to the complex impedance of the ADC input at the desired intermediate frequency, or consider the resistive part of the ADC input to be part of the resistive termination of the filter and the capacitive part of the ADC input to be part of the filter itself. The capacitive load of the ADC input can be absorbed into most LC bandpass filter designs with a final shunt LC tank stage.

The analog input circuit of the ADC31JB68 device is a buffered input with an internal differential termination. Compared to an ADC with a switched-capacitor input sampling network that has a time-varying input impedance, the ADC31JB68 device provides a time-constant input impedance that simplifies the interface design joining the ADC and ADC driver. A simplified passive model of the ADC input network is shown in Figure 61 that includes the termination resistance, input capacitance, parasitic bond-wire inductance, and routing parastics.

Figure 61. Simplified Analog Input Network Circuit Model

A more accurate load model is described by the measured differential SDD11 (100-Ω) parameter model. A plot of the differential impedance derived from the model is shown on the Smith chart of Figure 62.

Figure 62. Differential 1-Port S-Parameter Measurement of the ADC Input (Sdd11, Z₀=100 Ω)