9.1.5.2 Link Interruption

The internal frame and multi-frame clocks must be stable to maintain the JESD204B link. The ADC31JB68 is designed to maintain the JESD204B link in most conditions but some features interrupt the internal clocks and break the link.

The following actions cause a break in the JESD204B link:

• The ADC31JB68 device is configured into power-down mode or sleep mode
• The ADC31JB68 device CLKIN clock divider setting is changed
• The serial data receiver performs a synchronization request
• The ADC31JB68 device detects a SYSREF assertion that is not aligned with the internal frame or multi-frame clocks
• The CLKIN input is interrupted
• Power to the device is interrupted

The following actions do not cause a change in clock alignment nor break the JESD204B link:

• The ambient temperature or operating voltages are varied across the ranges specified in the normal operating conditions.
• The ADC31JB68 device detects a SYSREF assertion that is aligned with the internal frame and multi-frame clocks.