10.1 Power Supply Design

The ADC31JB68 device is a very-high dynamic range device, and therefore requires very-low noise power supplies. LDO-type regulators, capacitive decoupling, and series isolation devices like ferrite beads are all recommended.

LDO-type, low-noise regulators should be used to generate the 1.2-V, 1.8-V, and 3.0-V supplies used by the device. To improve power efficiency, a switching-type regulator may precede the LDO to efficiently drop a supply to an intermediate voltage that satisfies the drop-out requirements of the LDO. The recommended supply path includes a switching-type regulator followed by an LDO to provide an efficient and low noise source. Additional ferrite beads and LC filters may be used to further suppress noise. Supplying power to multiple devices in a system from one regulator may result in noise coupling between the multiple devices; therefore, series isolation devices and additional capacitive decoupling is recommended to improve the isolation. VACLK1.2, a sensitive supply that powers the internal clock path, can be sourced by the same regulator as the VA1.2 supply, but the VACLK1.2 supply should be isolated using a ferrite device.

The power supplies must be applied to the ADC31JB68 device in this specific sequence:

1. VA3.0
2. VA1.8 and VA1.2 and VACLK1.2

First, apply the VA3.0 (+3.0 V) to provide the bias for the ESD diodes. Next, within 1 ms after enabling the VA3.0 supply, apply the VA1.8 (+1.8-V) and VA1.2 (+1.2-V) and VACLK1.2 (+1.2-V) supplies. Use the reverse order to turn off the power supplies off.