The signal-to-noise ratio of the ADC is limited by three different factors, as shown in Equation 1. Quantization noise (typically 74 dB for a 12-bit ADC) and thermal noise limit SNR at low input frequencies, and clock jitter sets SNR for higher input frequencies.

Equation 1.

The SNR limitation resulting from sample clock jitter can be calculated with Equation 2.

Equation 2.

The total clock jitter (T_Jitter) has two components: the internal aperture jitter (130 fs for the device), which is set by the noise of the clock input buffer, and the external clock. T_Jitter can be calculated with Equation 3.

Equation 3.

External clock jitter can be minimized by using high-quality clock sources and jitter cleaners as well as band-pass filters at the clock input and a faster clock slew rate improves ADC aperture jitter. The devices have a typical thermal noise of 73.5 dBFS and an internal aperture jitter of 130 fs. The SNR, depending on the amount of external jitter for different input frequencies. Figure 8-7 shows SNR (from 1 MHz offset leaving the 1/f flicker noise) for different jitter of clock driver.

Figure 8-7 SNR vs Frequency for Different Clock Jitter