ZHCSD67C July   2014  – March 2016 ADC3241 , ADC3242 , ADC3243 , ADC3244

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: ADC3241, ADC3242
    6. 7.6  Electrical Characteristics: ADC3243, ADC3244
    7. 7.7  Electrical Characteristics: General
    8. 7.8  AC Performance: ADC3241
    9. 7.9  AC Performance: ADC3242
    10. 7.10 AC Performance: ADC3243
    11. 7.11 AC Performance: ADC3244
    12. 7.12 Digital Characteristics
    13. 7.13 Timing Requirements: General
    14. 7.14 Timing Requirements: LVDS Output
    15. 7.15 Typical Characteristics: ADC3241
    16. 7.16 Typical Characteristics: ADC3242
    17. 7.17 Typical Characteristics: ADC3243
    18. 7.18 Typical Characteristics: ADC3244
    19. 7.19 Typical Characteristics: Common
    20. 7.20 Typical Characteristics: Contour
  8. 8 Parameter Measurement Information
    1. 8.1 Timing Diagrams
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Inputs
      2. 9.3.2 Clock Input
        1. 9.3.2.1 SNR and Clock Jitter
      3. 9.3.3 Digital Output Interface
        1. 9.3.3.1 One-Wire Interface: 14x Serialization
        2. 9.3.3.2 Two-Wire Interface: 7x Serialization
    4. 9.4 Device Functional Modes
      1. 9.4.1 Input Clock Divider
      2. 9.4.2 Chopper Functionality
      3. 9.4.3 Power-Down Control
        1. 9.4.3.1 Improving Wake-Up Time From Global Power-Down
      4. 9.4.4 Internal Dither Algorithm
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
        1. 9.5.1.1 Register Initialization
          1. 9.5.1.1.1 Serial Register Write
          2. 9.5.1.1.2 Serial Register Readout
      2. 9.5.2 Register Initialization
    6. 9.6 Register Maps
      1. 9.6.1 Summary of Special Mode Registers
      2. 9.6.2 Serial Register Description
        1. 9.6.2.1  Register 01h
        2. 9.6.2.2  Register 03h
        3. 9.6.2.3  Register 04h
        4. 9.6.2.4  Register 05h
        5. 9.6.2.5  Register 06h
        6. 9.6.2.6  Register 07h
        7. 9.6.2.7  Register 09h
        8. 9.6.2.8  Register 0Ah
        9. 9.6.2.9  Register 0Bh
        10. 9.6.2.10 Register 0Eh
        11. 9.6.2.11 Register 0Fh
        12. 9.6.2.12 Register 13h (address = 13h)
        13. 9.6.2.13 Register 15h
        14. 9.6.2.14 Register 25h
        15. 9.6.2.15 Register 27h
        16. 9.6.2.16 Register 41Dh
        17. 9.6.2.17 Register 422h
        18. 9.6.2.18 Register 434h
        19. 9.6.2.19 Register 439h
        20. 9.6.2.20 Register 51Dh
        21. 9.6.2.21 Register 522h
        22. 9.6.2.22 Register 534h
        23. 9.6.2.23 Register 539h
        24. 9.6.2.24 Register 608h
        25. 9.6.2.25 Register 70Ah
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Driving Circuit Design: Low Input Frequencies
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Driving Circuit Design: Input Frequencies Between 100 MHz to 230 MHz
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
      3. 10.2.3 Driving Circuit Design: Input Frequencies Greater than 230 MHz
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curve
  11. 11Power-Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 相关链接
    2. 13.2 社区资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

RGZ Package
48-Pin VQFN
Top View
ADC3241 ADC3242 ADC3243 ADC3244 Pin_dgm_SBAS671.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
AVDD 6-9, 12, 17, 20, 25, 28-30 I Analog 1.8-V power supply
CLKM 18 I Negative differential clock input for the ADC
CLKP 19 I Positive differential clock input for the ADC
DA0M 48 O Negative serial LVDS output for channel A0
DA0P 47 O Positive serial LVDS output for channel A0
DA1M 46 O Negative serial LVDS output for channel A1
DA1P 45 O Positive serial LVDS output for channel A1
DB0M 40 O Negative serial LVDS output for channel B0
DB0P 39 O Positive serial LVDS output for channel B0
DB1M 38 O Negative serial LVDS output for channel B1
DB1P 37 O Positive serial LVDS output for channel B1
DCLKM 44 O Negative bit clock output
DCLKP 43 O Positive bit clock output
DVDD 2, 4, 33, 35 I Digital 1.8-V power supply
FCLKM 42 O Negative frame clock output
FCLKP 41 O Positive frame clock output
GND 1, 3, 5, 32, 34, 36, PowerPAD™ I Ground, 0 V
INAM 11 I Negative differential analog input for channel A
INAP 10 I Positive differential analog input for channel A
INBM 26 I Negative differential analog input for channel B
INBP 27 I Positive differential analog input for channel B
PDN 31 I Power-down control. This pin can be configured via the SPI.
This pin has an internal 150-kΩ pull-down resistor.
RESET 21 I Hardware reset; active high. This pin has an internal 150-kΩ pull-down resistor.
SCLK 13 I Serial interface clock input. This pin has an internal 150-kΩ pull-down resistor.
SDATA 14 I Serial interface data input. This pin has an internal 150-kΩ pull-down resistor.
SDOUT 16 O Serial interface data output
SEN 15 I Serial interface enable; active low.
This pin has an internal 150-kΩ pull-up resistor to AVDD.
SYSREFM 23 I Negative external SYSREF input
SYSREFP 22 I Positive external SYSREF input
VCM 24 O Common-mode voltage for analog inputs
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