ZHCSPO2 September 2023 ADC32RF52
PRODUCTION DATA
There are 4 separate NCOs per channel - one for each band (e.g. NCO1 = band 1) and 4 different frequencies can be programmed per NCO as shown in Figure 7-37. The NCO frequencies are located in the DDCA/B pages (0x05 0x08 for channel A and 0x05 0x10 for channel B) in registers 0x100 to 0x17D. Depending on # of bands used, the frequencies for each NCO are selected in registers 0x3B and 0x41 (DIGITAL page) as shown in Table 7-24. If the NCO frequencies are the same for channel A and channel B they can be written to both DDCA and DDCB pages simultaneously by selecting both pages (0x05 0x18).
Single band DDC uses the frequencies of both NCO1 and NCO2 for a combined 8 different frequencies for NCO1 using 3 bit control (NCO2 CHx [1] and NCO1 CHx [1:0]). The NCO2 selection bit (D3) decides if frequencies from NCO1 or NCO2 are being used. In dual and quad band DDC operating mode there are 4 frequencies per NCO available and selected using 2 register bits (NCOx CHx [1:0]). The NCO frequency selection registers are shown in Table 7-24.
# OF BANDS | ADDR | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|
SINGLE | 0x3B | 0 | 0 | 0 | 0 | NCO2 CHA [1] | 0 | NCO1 CHA [1:0] | |
0x41 | 0 | 0 | 0 | 0 | NCO2 CHB [1] | 0 | NCO1 CHB [1:0] | ||
DUAL | 0x3B | 0 | 0 | 0 | 0 | NCO2 CHA [1:0] | NCO1 CHA [1:0] | ||
0x41 | 0 | 0 | 0 | 0 | NCO2 CHB [1:0] | NCO1 CHB [1:0] | |||
QUAD | 0x3B | NCO4 CHA [1:0] | NCO3 CHA [1:0] | NCO2 CHA [1:0] | NCO1 CHA [1:0] | ||||
0x41 | NCO4 CHB [1:0] | NCO3 CHB [1:0] | NCO2 CHB [1:0] | NCO1 CHB [1:0] |
To select a different frequency for the NCO, two registers (0x3B and 0x41) in the DIGITAL page have to be updated. Assuming a SPI clock frequency of 10 MHz (100 ns period), programming two registers (2x (16 bit address and 8 bit data) = 48 bit) means that the NCO frequency would be updated in ~ 5 us.
When updating the currently being used NCO frequency to a new frequency, the following command has to be written to load the new frequency into the NCO - 0x181 0x00/0x30 in each of the DDCA/B pages.
ADDR | DATA | DESCRIPTION |
---|---|---|
0x05 | 0x02 | Select DIGITAL page |
0x3B | 0x01 | Select frequency 2 for NCO1 of channel A. |
0x05 | 0x08 | Select DDCA page |
0x10D...0x108 | 0x.. | Write new frequency in frequency 2 of NCO1 of channel A |
0x181 | 0x00 | Update NCO with current frequencies from the register map. |
0x181 | 0x30 |
The NCO phase accumulators can be reset using the external SYSREF signal. A SYSREF mask can be setup such the SYSREF signal only goes to the NCO and the remaining device remains unaffected. The following register writes configure the SYSREF mask to only affect the NCO. After completion the SYSREF mask should be set back to default.
ADDR | DATA | DESCRIPTION |
---|---|---|
0x05 | 0x18 | Select DDCAB/CD page |
0x181 | 0x40 | Reset NCO phases with SYSREF toggle |
0x05 | 0x02 | Select Digital Page |
0x357 | 0xA2 | SYSREF mask settings (0x00 is mask default) |
0x358 | 0x02 | SYSREF mask settings (0x00 is mask default) |