ZHCSQQ1B june 2022 – august 2023 ADC32RF54 , ADC32RF55
PRODUCTION DATA
The ADC provides two options (configured using SPI) to indicate if input fullscale overrange occurred:
Decimation | # of Bands | OVR Latency (incl JESD, in sampling clock cycles) |
---|---|---|
DDC Bypass | - | 140-144 |
8 | Single (real and complex), dual | 44 |
Quad | 33 | |
16 | Single (real and complex), dual | 80 |
Quad | 58 | |
32 | Single (real and complex), dual | 152 |
Quad | 108 | |
64 | Single (real and complex), dual | 296 |
Quad | 208 | |
128 | Single (real and complex), dual | 584 |
Quad | 408 |
ADDR | DATA | DESCRIPTION | ADDR | DATA | DESCRIPTION | |
---|---|---|---|---|---|---|
OVRA on GPIO1 and OVRB on GPIO2, OVR sticky | OVR on JESD | |||||
0x05 | 0x02 | Select DIGITAL page | 0x05 | 0x02 | Select DIGITAL page | |
0x238 | 0xF0 | 0x2E | D0 | Set D0 = 1 to enable OVR on JESD | ||
0x383 | 0x02 | Enable individual OVR on GPIO | 0x05 | 0x00 | ||
Clear OVR | These extra writes are only needed using decimation | |||||
0x05 | 0x40 | Select ANALOG page | 0x05 | 0x18 | Select DDCA & DDCB page at same time | |
0x74 | 0x04 | Clear OVR flag chA | 0x20 | 0x06 | Enable OVR on JESD | |
0x74 | 0x00 | |||||
0x84 | 0x04 | Clear OVR flag chB | ||||
0x84 | 0x00 | |||||
Change OVR from sticky to non sticky (self clear) | ||||||
0x05 | 0x40 | Select ANALOG page | ||||
0x31 | 0x06 | Set OVR to non-sticky |