ZHCSTP2
November 2023
ADC34RF55
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics - Power Consumption
5.6
Electrical Characteristics - DC Specifications
5.7
Electrical Characteristics - AC Specifications (Dither DISABLED)
5.8
Electrical Characteristics - AC Specifications (Dither ENABLED)
5.9
Timing Requirements
5.10
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Analog Inputs
6.3.1.1
Input Bandwidth and Full-Scale
6.3.1.2
Input Imbalance
6.3.1.3
Over Range Indication
6.3.1.4
Analog out-of-band dither
6.3.2
Sampling Clock Input
6.3.3
ADC Foreground Calibration
6.3.3.1
Calibration Control
6.3.3.2
ADC Switch
6.3.3.3
Calibration Configuration
6.3.4
SYSREF
6.3.4.1
SYSREF Capture Detection
6.3.5
Decimation Filter
6.3.5.1
Decimation Filter Response
6.3.5.2
Decimation Filter Configuration
6.3.5.3
20-bit Output Mode
6.3.5.4
Numerically Controlled Oscillator (NCO)
6.3.5.5
NCO Frequency Programming Using the SPI Interface
6.3.5.6
Fast Frequency Hopping
6.3.5.6.1
Fast frequency hopping using the GPIO1/2 pins
6.3.5.6.2
Fast frequency hopping using GPIO1/2, SEN and SDATA pins
6.3.5.6.3
Fast frequency hopping using the fast SPI
6.3.6
JESD204B Interface
6.3.6.1
JESD204B Initial Lane Alignment (ILA)
6.3.6.1.1
SYNC Signal
6.3.6.2
JESD204B Frame Assembly
6.3.6.2.1
JESD204B Frame Assembly in Bypass Mode
6.3.6.2.2
JESD204B Frame Assembly with Real Decimation - Single Band
6.3.6.2.3
JESD204B Frame Assembly with Complex Decimation - Single Band
6.3.6.2.4
JESD204B Frame Assembly with Decimation - Dual Band
6.3.6.3
SERDES Output MUX
6.3.7
Test Pattern
6.3.7.1
Transport Layer
6.3.7.2
Link Layer
6.3.7.3
Internal Capture Memory Buffer
6.4
Device Functional Modes
6.4.1
Bypass Mode
6.4.2
Digital Averaging
6.5
Programming
6.5.1
GPIO Pin Control
6.5.2
Configuration using the SPI interface
6.5.2.1
Register Write
6.5.2.2
Register Read
6.6
Register Maps
6.6.1
Detailed Register Description
7
Application Information Disclaimer
7.1
Application Information
7.2
Typical Application
7.2.1
Wideband RF Sampling Receiver
7.2.2
Design Requirements
7.2.2.1
Input Signal Path
7.2.2.2
Clocking
7.2.3
Detailed Design Procedure
7.2.3.1
Sampling Clock
7.2.4
Application Curves
7.3
Initialization Set Up
7.3.1
Initial Device Configuration After Power-Up
7.3.1.1
STEP 1: RESET
7.3.1.2
STEP 2: Device Configuration
7.3.1.3
STEP 3: JESD Interface Configuration (1)
7.3.1.4
STEP 4: SYSREF Synchronization
7.3.1.5
STEP 5: JESD Interface Configuration (2)
7.3.1.6
STEP 6: Analog Trim Settings
7.3.1.7
STEP 7: Calibration Configuration
7.3.1.8
STEP 8: SYSREF Synchronization
7.3.1.9
STEP 9: Run Power up Calibration
7.3.1.10
Step 10: JESD Interface Synchronization
7.3.1.11
Step 11: NCO Configuration
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.2
Layout Example
8
Device and Documentation Support
8.1
器件支持
8.1.1
第三方米6体育平台手机版_好二三四免责声明
8.2
接收文档更新通知
8.3
支持资源
8.4
Trademarks
8.5
静电放电警告
8.6
术语表
9
Revision History
10
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RTD|64
MPQF141C
散热焊盘机械数据 (封装 | 引脚)
RTD|64
QFND625
订购信息
zhcstp2_oa
8.1
器件支持
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP
|
米乐app下载官网(中国)|ios|Android/通用版APP最新版
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米乐|米乐·M6(中国大陆)官方网站
|
千亿体育登陆地址
|
华体会体育(中国)HTH·官方网站
|
千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载
|
18新利网v1.2.5|中国官方网站
|
bob电竞真人(中国官网)安卓/ios苹果/电脑版【1.97.95版下载】
|
千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装
|