ZHCSSA6C september   2009  – june 2023 ADS1000-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog-to-Digital Converter
      2. 7.3.2 Clock Generator
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes
      2. 7.4.2 Reset and Power Up
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
      2. 7.5.2 ADS1000-Q1 I2C Addresses
      3. 7.5.3 I2C General Call
      4. 7.5.4 I2C Data Rates
      5. 7.5.5 Output Code Calculation
    6. 7.6 Register Maps
      1. 7.6.1 Output Register
      2. 7.6.2 Configuration Register
      3. 7.6.3 Reading From the ADS1000-Q1
      4. 7.6.4 Writing to the ADS1000-Q1
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Connections
        1. 8.1.1.1 Connecting Multiple Devices
        2. 8.1.1.2 Using GPIO Ports For I2C
        3. 8.1.1.3 Single-Ended Inputs
    2. 8.2 Typical Applications
      1. 8.2.1 ADS1000-Q1 With Current-Shunt Monitor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Part Selection
            1. 8.2.1.2.1.1 Gain Settings
            2. 8.2.1.2.1.2 Circuit Implementation
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Low-Side Current Measurement
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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8.4.1 Layout Guidelines

An optimum layout for the ADS1000-Q1 helps reduce noise and improve performance. The decoupling capacitor on VDD must be placed as close to the VDD pin as possible. Also, the analog input pins (VIN+ and VIN–) must be routed carefully to reduce noise.
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