To access a specific register from the ADS101x-Q1, the controller must first write an appropriate value to register address pointer bits P[1:0] in the Address Pointer register. The Address Pointer register is written to directly after the target address byte, low R/W bit, and a successful target acknowledgment. After the Address Pointer register is written, the target acknowledges, and the controller issues a STOP or a repeated START condition.

When reading from the ADS101x-Q1, the previous value written to bits P[1:0] determines the register that is read. To change which register is read, a new value must be written to P[1:0]. To write a new value to P[1:0], the controller issues a target address byte with the R/W bit low, followed by the Address Pointer register byte. No additional data has to be transmitted, and a STOP condition can be issued by the controller. The controller can now issue a START condition and send the target address byte with the R/W bit high to begin the read. Figure 7-9 details this sequence. If repeated reads from the same register are desired, there is no need to continually send the Address Pointer register, because the ADS101x-Q1 store the value of P[1:0] until modified by a write operation. However, for every write operation, the Address Pointer register must be written with the appropriate values.

A. The values of A0 and A1 are determined by the ADDR pin.

B. The controller can leave SDA high to terminate a single-byte read operation.

C. The controller can leave SDA high to terminate a two-byte read operation.

Figure 7-9 Timing Diagram for Reading From ADS101x-Q1

A. The values of A0 and A1 are determined by the ADDR pin.

Figure 7-10 Timing Diagram for Writing to ADS101x-Q1

A. The values of A0 and A1 are determined by the ADDR pin.

Figure 7-11 Timing Diagram for SMBus Alert Response