ZHCSHA5E july 2010 – july 2023 ADS1013-Q1 , ADS1014-Q1 , ADS1015-Q1
PRODUCTION DATA
The I2C bus operates at one of three speeds. Standard mode allows a clock frequency of up to 100 kHz; fast mode permits a clock frequency of up to 400 kHz; and high-speed mode (also called Hs mode) allows a clock frequency of up to 3.4 MHz. The ADS101x-Q1 are fully compatible with all three modes.
No special action is required to use the ADS101x-Q1 in standard or fast mode, but high-speed mode must be activated. To activate high-speed mode, send a special address byte of 00001xxxb following the START condition, where xxx are bits unique to the Hs-capable controller. This byte is called the Hs controller code, and is different from normal address bytes; the eighth bit does not indicate read/write status. The ADS101x-Q1 do not acknowledge this byte; the I2C specification prohibits acknowledgment of the Hs controller code. Upon receiving a controller code, the ADS101x-Q1 switch on Hs mode filters, and communicate at up to 3.4 MHz. The ADS101x-Q1 switch out of Hs mode with the next STOP condition.
For more information on high-speed mode, consult the I2C specification.