8.3.3 Full-Scale Range (FSR) and LSB Size

A programmable gain amplifier (PGA) is implemented in front of the ADS1018 ΔΣ ADC core. The full-scale range is configured by bits PGA[2:0] in the Config register, and can be set to ±6.144 V, ±4.096 V, ±2.048 V, ±1.024 V, ±0.512 V, or ±0.256 V.

Table 1 shows the FSR together with the corresponding LSB size. Calculate the LSB size from the full-scale voltage by the formula shown in Equation 2. However, make sure that the analog input voltage never exceeds the analog input voltage range limit given in the Electrical Characteristics. If VDD greater than 4 V is used, the ±6.144-V full-scale range allows input voltages to extend up to the supply. Note though that in this case, or whenever the supply voltage is less than the full-scale range (for example, VDD = 3.3 V and full-scale range = ±4.096 V), a full-scale ADC output code cannot be obtained. This inability means that some dynamic range is lost.