ZHCS311D May 2009 – January 2018 ADS1113 , ADS1114 , ADS1115
PRODUCTION DATA.
A programmable gain amplifier (PGA) is implemented before the ΔΣ ADC of the ADS1114 and ADS1115. The full-scale range is configured by bits PGA[2:0] in the Config register and can be set to ±6.144 V, ±4.096 V, ±2.048 V, ±1.024 V, ±0.512 V, ±0.256 V. Table 3 shows the FSR together with the corresponding LSB size. Equation 4 shows how to calculate the LSB size from the selected full-scale range.
FSR | LSB SIZE |
---|---|
±6.144 V(1) | 187.5 μV |
±4.096 V(1) | 125 μV |
±2.048 V | 62.5 μV |
±1.024 V | 31.25 μV |
±0.512 V | 15.625 μV |
±0.256 V | 7.8125 μV |
The FSR of the ADS1113 is fixed at ±2.048 V.
Analog input voltages must never exceed the analog input voltage limits given in the Absolute Maximum Ratings. If a VDD supply voltage greater than 4 V is used, the ±6.144 V full-scale range allows input voltages to extend up to the supply. Although in this case (or whenever the supply voltage is less than the full-scale range; for example, VDD = 3.3 V and full-scale range = ±4.096 V), a full-scale ADC output code cannot be obtained. For example, with VDD = 3.3 V and FSR = ±4.096 V, only signals up to VIN = ±3.3 V can be measured. The code range that represents voltages |VIN| > 3.3 V is not used in this case.