ZHCSEB1A October 2015 – November 2015 ADS1118-Q1
PRODUCTION DATA.
Delta-sigma (ΔΣ) analog-to-digital converter (ADC) architecture is based on the principle of oversampling. The input signal of a ΔΣ ADC is sampled at a high frequency (modulator frequency), and subsequently filtered and decimated in the digital domain to yield a conversion result at the respective output data rate. The ratio between modulator frequency and output data rate is called the oversampling ratio (OSR). Increasing the OSR, and thus reducing the output data rate, optimizes the noise performance of the ADC. That is, the input-referred noise reduces when the output data rate is reduced because more samples of the internal modulator are averaged to yield one conversion result. Increasing the gain also reduces the input-referred noise, and is particularly useful when measuring low-level signals.
Table 1 and Table 2 summarize the device noise performance. Data are representative of typical noise performance at TA = 25°C with the inputs shorted together externally. Table 1 show the input-referred noise in units of μVRMS for the conditions shown. Note that µVPP values are shown in parenthesis. Table 2 shows the corresponding data in effective number of bits (ENOB) calculated from μVRMS values using Equation 1. The noise-free bits calculated from peak-to-peak noise values using Equation 2 are shown in parenthesis.
DATA RATE (SPS) |
FULL-SCALE RANGE (FSR) | |||||
---|---|---|---|---|---|---|
±6.144 V | ±4.096 V | ±2.048 V | ±1.024 V | ±0.512 V | ±0.256 V | |
8 | 187.5 (187.5) | 125.0 (125.0) | 62.5 (62.5) | 31.25 (31.25) | 15.62 (15.62) | 7.81 (7.81) |
16 | 187.5 (187.5) | 125.0 (125.0) | 62.5 (62.5) | 31.25 (31.25) | 15.62 (15.62) | 7.81 (7.81) |
32 | 187.5 (187.5) | 125.0 (125.0) | 62.5 (62.5) | 31.25 (31.25) | 15.62 (15.62) | 7.81 (7.81) |
64 | 187.5 (187.5) | 125.0 (125.0) | 62.5 (62.5) | 31.25 (31.25) | 15.62 (15.62) | 7.81 (7.81) |
128 | 187.5 (187.5) | 125.0 (125.0) | 62.5 (62.5) | 31.25 (31.25) | 15.62 (15.62) | 7.81 (12.35) |
250 | 187.5 (252.09) | 125.0 (148.28) | 62.5 (84.03) | 31.25 (39.54) | 15.62 (16.06) | 7.81 (18.53) |
475 | 187.5 (266.92) | 125.0 (227.38) | 62.5 (79.08) | 31.25 (56.84) | 15.62 (32.13) | 7.81 (25.95) |
860 | 187.5 (430.06) | 125.0 (266.93) | 62.5 (118.63) | 31.25 (64.26) | 15.62 (40.78) | 7.81 (35.83) |
DATA RATE (SPS) |
FULL-SCALE RANGE (FSR) | |||||
---|---|---|---|---|---|---|
±6.144 V | ±4.096 V | ±2.048 V | ±1.024 V | ±0.512 V | ±0.256 V | |
8 | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) |
16 | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) |
32 | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) |
64 | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) |
128 | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (16) | 16 (15.33) |
250 | 16 (15.57) | 16 (15.75) | 16 (15.57) | 16 (15.66) | 16 (15.96) | 16 (14.75) |
475 | 16 (15.49) | 16 (15.13) | 16 (15.66) | 16 (15.13) | 16 (14.95) | 16 (14.26) |
860 | 16 (14.8) | 16 (14.9) | 16 (15.07) | 16 (14.95) | 16 (14.61) | 16 (13.8) |