ZHCSEE1F October 2010 – September 2019 ADS1118
PRODUCTION DATA.
A programmable gain amplifier (PGA) is implemented before the ADS1118 ΔΣ core. The full-scale range is configured by three bits (PGA[2:0]) in the Config Register and can be set to ±6.144 V, ±4.096 V, ±2.048 V, ±1.024 V, ±0.512 V, ±0.256 V. Table 3 shows the FSR together with the corresponding LSB size. LSB size is calculated from full-scale voltage by the formula shown in Equation 4. However, analog input voltages may never exceed the analog input voltage limits given in the Electrical Characteristics. If a supply voltage of VDD greater than 4 V is used, the ±6.144 V full-scale range allows input voltages to extend up to the supply. Note though that in this case, or whenever the supply voltage is less than the full-scale range (for example, VDD = 3.3 V and full-scale range = ±4.096 V), a full-scale ADC output code cannot be obtained. This inability means that some dynamic range is lost.
FSR | LSB SIZE |
---|---|
±6.144 V(1) | 187.5 μV |
±4.096 V(1) | 125 μV |
±2.048 V | 62.5 μV |
±1.024 V | 31.25 μV |
±0.512 V | 15.625 μV |
±0.256 V | 7.8125 μV |