ZHCSFJ3A July 2014 – September 2016 ADS1148-Q1
PRODUCTION DATA.
PIN | TYPE(1) | DESCRIPTION(2) | |
---|---|---|---|
NAME | NO. | ||
AIN0/IEXC | 11 | I | Analog input 0, optional excitation current output |
AIN1/IEXC | 12 | I | Analog input 1, optional excitation current output |
AIN2/IEXC/GPIO2 | 17 | I/O | Analog input 2, optional excitation current output, or general-purpose digital input/output pin 2 |
AIN3/IEXC/GPIO3 | 18 | I/O | Analog input 3, optional excitation current output, or general-purpose digital input/output pin 3 |
AIN4/IEXC/GPIO4 | 13 | I/O | Analog input 4, optional excitation current output, or general-purpose digital input/output pin 4 |
AIN5/IEXC/GPIO5 | 14 | I/O | Analog input 5, optional excitation current output, or general-purpose digital input/output pin 5 |
AIN6/IEXC/GPIO6 | 15 | I/O | Analog input 6, optional excitation current output, or general-purpose digital input/output pin 6 |
AIN7/IEXC/GPIO7 | 16 | I/O | Analog input 7, optional excitation current output, or general-purpose digital input/output pin 7 |
AVDD | 22 | P | Positive analog power supply, connect a 0.1-µF capacitor to AVSS |
AVSS | 21 | P | Negative analog power supply |
CLK | 3 | I | External clock input, tie to DGND to activate the internal oscillator |
CS | 24 | I | Chip select (active low) |
DGND | 2 | G | Digital ground |
DIN | 27 | I | Serial data input |
DOUT/DRDY | 26 | O | Serial data output, or data out combined with data ready |
DRDY | 25 | O | Data ready (active low) |
DVDD | 1 | P | Digital power supply, connect a 0.1-µF capacitor to DGND |
IEXC1 | 20 | O | Excitation current output 1 |
IEXC2 | 19 | O | Excitation current output 2 |
REFN0/GPIO1 | 6 | I/O | Negative external reference input 0, or general-purpose digital input/output pin 1 |
REFN1 | 8 | I | Negative external reference input 1 |
REFP0/GPIO0 | 5 | I/O | Positive external reference input 0, or general-purpose digital input/output pin 1 |
REFP1 | 7 | I | Positive external reference input 1 |
RESET | 4 | I | Reset (active low) |
SCLK | 28 | I | Serial clock input |
START | 23 | I | Conversion start |
VREFCOM | 10 | O | Negative internal reference voltage output, connect to AVSS when using a unipolar supply or to the mid-voltage ground when using a bipolar supply |
VREFOUT | 9 | O | Positive internal reference voltage output, connect a capacitor in the range of 1 µF to 47 µF to VREFCOM |