ZHCSGA6A February 2017 – June 2017 ADS114S06 , ADS114S08
PRODUCTION DATA.
If the ADC connection leads are in close proximity to industrial motors and conductors, coupling of 50-Hz and
60-Hz power line frequencies can occur. The coupled noise interferes with the signal voltage, and can lead to inaccurate or unstable conversions. The digital filter provides enhanced rejection of power-line-coupled noise for data rates of 60 SPS and less. Program the filter to tradeoff data rate and conversion latency versus the desired level of line cycle rejection. Table 16 and Table 17 summarize the ADC 50-Hz and 60-Hz line-cycle rejection based on ±1-Hz and ±2-Hz tolerance of power-line to ADC clock frequency. The best possible power-line rejection is provided by using an accurate ADC clock.
| DATA RATE (SPS)(1) | LOW-LATENCY DIGITAL FILTER LINE CYCLE REJECTION (dB) | |||
|---|---|---|---|---|
| 50 Hz ± 1 Hz | 60 Hz ± 1 Hz | 50 Hz ± 2 Hz | 60 Hz ± 2 Hz | |
| 2.5 | –113.7 | –95.4 | –97.7 | –92.4 |
| 5 | –111.9 | –95.4 | –87.6 | –81.8 |
| 10 | –111.5 | –95.4 | –85.7 | –81.0 |
| 16.6 | –33.8 | –20.9 | –27.8 | –20.8 |
| 20 | –95.4 | –95.4 | –75.5 | –80.5 |
| 50 | –33.8 | –15.5 | –27.6 | –15.1 |
| 60 | –13.4 | –35.0 | –12.6 | –29.0 |
| DATA RATE (SPS)(1) | SINC3 DIGITAL FILTER LINE CYCLE REJECTION (dB) | |||
|---|---|---|---|---|
| 50 Hz ± 1 Hz | 60 Hz ± 1 Hz | 50 Hz ± 2 Hz | 60 Hz ± 2 Hz | |
| 2.5 | –108.7 | –113.4 | –107.2 | –112.1 |
| 5 | –103.2 | –107.8 | –90.1 | –95.0 |
| 10 | –101.8 | –106.4 | –84.6 | –89.4 |
| 16.6 | –101.6 | –63.0 | –83.4 | –62.4 |
| 20 | –53.5 | –106.1 | –53.5 | –88.0 |
| 50 | –101.4 | –46.7 | –82.9 | –45.3 |
| 60 | –40.3 | –105.1 | –37.8 | –87.2 |