ZHCSGA6A February 2017 – June 2017 ADS114S06 , ADS114S08
PRODUCTION DATA.
The ADS114S06 offers four dedicated general-purpose input and output (GPIO) pins, and the ADS114S08 offers four pins (AIN8 to AIN11) that serve a dual purpose as either analog inputs or GPIOs.
Two registers control the function of the GPIO pins. Use the CON[3:0] bits of the GPIO configuration register (11h) to configure a pin as a GPIO pin. The upper four bits (DIR[3:0]) of the GPIO data register (10h) configure the GPIO pin as either an input or an output. The lower four bits (DAT[3:0]) of the GPIO data register contain the input or output GPIO data. If a GPIO pin is configured as an input, the respective DAT[x] bit reads the status of the pin; if a GPIO pin is configured as an output, write the output status to the respective DAT[x] bit. For more information about the use of GPIO pins, see the Configuration Registers section.
Figure 80 shows a diagram of how these functions are combined onto a single pin. Note that when the pin is configured as a GPIO, the corresponding logic is powered from AVDD and AVSS. When the devices are operated with bipolar analog supplies, the GPIO outputs bipolar voltages. Care must be taken to not load the GPIO pins when used as outputs because large currents can cause droop or noise on the analog supplies. GPIO pins use Schmitt triggered inputs, with hysteresis to make the input more resistance to noise; see the Electrical Characteristics table for GPIO thresholds.
For connections of unused GPIO pins, see the Unused Inputs and Outputs section.