ZHCSGA6A February 2017 – June 2017 ADS114S06 , ADS114S08
PRODUCTION DATA.
The device serial interface is capable of full-duplex operation when reading conversion data and not using the RDATA command. In full-duplex operation, commands are decoded at the same time that conversion data are read. Commands can be sent on any 8-bit data boundary during a data read operation. When a RREG or RDATA command is recognized, the current data read operation is aborted and the conversion data are corrupted, unless the command is sent when the last byte of the conversion result is retrieved. The device starts to output the requested data on DOUT/DRDY at the first SCLK rising edge after the command byte. To read data without interruption, keep DIN low when clocking out data.
A WREG command can be sent without corrupting an ongoing read operation. Sending a WREG command when reading data minimizes the time between reading the data and setting the device configuration for the next conversion. Figure 92 shows an example for sending a WREG command to write two configuration registers when reading conversion data by using read data direct mode. After the command is clocked in, the device resets the digital filter and starts converting with the new register settings as long as the device is in continuous conversion mode. The digital filter is reset and conversions are restarted after each data byte is received. In this example, the digital filter is reset when the first byte is received, decoding the input multiplexer and again when the PGA is set. The WREG command can be sent on any of the 8-bit boundaries. The example in Figure 92 has the STATUS and CRC bytes disabled.