ZHCSQZ9A March 2022 – October 2022 ADS117L11
PRODUCTION DATA
The device is also reset through SPI operation by inputting a special bit pattern. The input pattern does not follow the input command format. There are two input patterns in which to reset the ADC. Pattern 1 consists of a minimum 1023 consecutive ones followed by one zero. The device resets on the falling edge of SCLK when the final zero is shifted in. This pattern can be used for either 3- or 4-wire SPI modes. Figure 8-23 shows a pattern 1 reset example.
Reset pattern 2 is only for use with the 4-wire SPI mode. To reset, input a minimum of 1024 consecutive ones (no ending zero value), followed by taking CS high at which time reset occurs. Use pattern 2 when the devices are connected in daisy-chain mode. Figure 8-24 shows a pattern 2 reset example.