Figure 9-5 is a layout example based on the circuit diagram of Figure 9-1. The ADC is shown in the WQFN package option. A four-layer PCB is used, with the inner layers dedicated as ground and power planes. Cutouts are used on the plane layers under the amplifier input pins to reduce stray capacitance to increase amplifier phase margin. Thermal vias for the ADS117L11 and THS4551 WQFN package thermal pad are not used so that bypass capacitors can be placed on the bottom layer underneath the devices. Place the smaller of the parallel supply bypass capacitors closest to the device supply pins.

See the QFN and SON PCB Attachment application report for details of attaching the WQFN package to the printed circuit board.