ZHCSKD9 October 2019 ADS1235-Q1
PRODUCTION DATA.
Figure 89 is an example layout of the ADS1235-Q1, requiring a minimum of three PCB layers. The example circuit is shown with single supply operation (AVSS = DGND). In this example, the inner layer is dedicated to the ground plane and the outer layers are used for signal and power traces. If a four-layer PCB is used, dedicate the additional inner layer as the power plane. In this example, the ADC is oriented in such a way to minimize crossover of the analog and digital signal traces.