8.3.3 PGA Voltage Monitor

The PGA has internal monitors to alarm of possible overrange conditions. Overrange conditions are possible if the signal voltage is over-driven, the common-mode voltage is out of range or if too much gain is used for the normal range of input signal. When overranged, the PGA output nodes are in saturation resulting in invalid conversion data. The high alarm bit asserts high (PGAH_ALM) If either the positive or negative PGA output is greater than AVDD – 0.2 V. Similarly, the low alarm bit asserts high (PGAL_ALM) if either positive or negative PGA output is less than AVSS + 0.2 V. The status of the alarm bits are read in the STATUS byte. The alarm bits are read-only and automatically reset at the start of the next conversion cycle after the overrange condition is cleared. The PGA voltage monitor diagram and threshold values are shown in Figure 42 and Figure 43.

Figure 42. PGA Voltage Monitor Diagram

Figure 43. PGA Monitor Thresholds

The PGA voltage monitors are fast-responding voltage comparators. Comparator operation is disabled during multiplexer changes to minimize triggering of false alarms. However, it is possible the alarms can trigger on other transient overload conditions that may occur after gain changes, sensor connection changes, and so on.