8.5.1.2 Serial Clock (SCLK)

SCLK is the serial clock input that shifts data into and out of the ADC. Output data are updated on the rising edge of SCLK and input data are latched on the falling edge of SCLK. Return SCLK low after the data operation is completed. SCLK is a Schmidt-triggered input designed to improve noise immunity. Even though SCLK is noise resistant, keep SCLK as noise-free as possible to avoid unintentional SCLK transitions. Avoid ringing and overshoot on the SCLK input. Place a series termination resistor close to the SCLK drive pin to reduce ringing.