ZHCSFP3C August   2016  – June 2017 ADS124S06 , ADS124S08

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Family Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Noise Performance
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Multiplexer
      2. 9.3.2  Low-Noise Programmable Gain Amplifier
        1. 9.3.2.1 PGA Input-Voltage Requirements
        2. 9.3.2.2 PGA Rail Flags
        3. 9.3.2.3 Bypassing the PGA
      3. 9.3.3  Voltage Reference
        1. 9.3.3.1 Internal Reference
        2. 9.3.3.2 External Reference
        3. 9.3.3.3 Reference Buffers
      4. 9.3.4  Clock Source
      5. 9.3.5  Delta-Sigma Modulator
      6. 9.3.6  Digital Filter
        1. 9.3.6.1 Low-Latency Filter
          1. 9.3.6.1.1 Low-Latency Filter Frequency Response
          2. 9.3.6.1.2 Data Conversion Time for the Low-Latency Filter
        2. 9.3.6.2 Sinc3 Filter
          1. 9.3.6.2.1 Sinc3 Filter Frequency Response
          2. 9.3.6.2.2 Data Conversion Time for the Sinc3 Filter
        3. 9.3.6.3 Note on Conversion Time
        4. 9.3.6.4 50-Hz and 60-Hz Line Cycle Rejection
        5. 9.3.6.5 Global Chop Mode
      7. 9.3.7  Excitation Current Sources (IDACs)
      8. 9.3.8  Bias Voltage Generation
      9. 9.3.9  System Monitor
        1. 9.3.9.1 Internal Temperature Sensor
        2. 9.3.9.2 Power Supply Monitors
        3. 9.3.9.3 Burn-Out Current Sources
      10. 9.3.10 Status Register
        1. 9.3.10.1 POR Flag
        2. 9.3.10.2 RDY Flag
        3. 9.3.10.3 PGA Output Voltage Rail Monitors
        4. 9.3.10.4 Reference Monitor
      11. 9.3.11 General-Purpose Inputs and Outputs (GPIOs)
      12. 9.3.12 Low-Side Power Switch
      13. 9.3.13 Cyclic Redundancy Check (CRC)
      14. 9.3.14 Calibration
        1. 9.3.14.1 Offset Calibration
        2. 9.3.14.2 Gain Calibration
    4. 9.4 Device Functional Modes
      1. 9.4.1 Reset
        1. 9.4.1.1 Power-On Reset
        2. 9.4.1.2 RESET Pin
        3. 9.4.1.3 Reset by Command
      2. 9.4.2 Power-Down Mode
      3. 9.4.3 Standby Mode
      4. 9.4.4 Conversion Modes
        1. 9.4.4.1 Continuous Conversion Mode
        2. 9.4.4.2 Single-Shot Conversion Mode
        3. 9.4.4.3 Programmable Conversion Delay
    5. 9.5 Programming
      1. 9.5.1 Serial Interface
        1. 9.5.1.1 Chip Select (CS)
        2. 9.5.1.2 Serial Clock (SCLK)
        3. 9.5.1.3 Serial Data Input (DIN)
        4. 9.5.1.4 Serial Data Output and Data Ready (DOUT/DRDY)
        5. 9.5.1.5 Data Ready (DRDY)
        6. 9.5.1.6 Timeout
      2. 9.5.2 Data Format
      3. 9.5.3 Commands
        1. 9.5.3.1  NOP
        2. 9.5.3.2  WAKEUP
        3. 9.5.3.3  POWERDOWN
        4. 9.5.3.4  RESET
        5. 9.5.3.5  START
        6. 9.5.3.6  STOP
        7. 9.5.3.7  SYOCAL
        8. 9.5.3.8  SYGCAL
        9. 9.5.3.9  SFOCAL
        10. 9.5.3.10 RDATA
        11. 9.5.3.11 RREG
        12. 9.5.3.12 WREG
      4. 9.5.4 Reading Data
        1. 9.5.4.1 Read Data Direct
        2. 9.5.4.2 Read Data by RDATA Command
        3. 9.5.4.3 Sending Commands When Reading Data
      5. 9.5.5 Interfacing with Multiple Devices
    6. 9.6 Register Map
      1. 9.6.1 Configuration Registers
        1. 9.6.1.1  Device ID Register (address = 00h) [reset = xxh]
        2. 9.6.1.2  Device Status Register (address = 01h) [reset = 80h]
        3. 9.6.1.3  Input Multiplexer Register (address = 02h) [reset = 01h]
        4. 9.6.1.4  Gain Setting Register (address = 03h) [reset = 00h]
        5. 9.6.1.5  Data Rate Register (address = 04h) [reset = 14h]
        6. 9.6.1.6  Reference Control Register (address = 05h) [reset = 10h]
        7. 9.6.1.7  Excitation Current Register 1 (address = 06h) [reset = 00h]
        8. 9.6.1.8  Excitation Current Register 2 (address = 07h) [reset = FFh]
        9. 9.6.1.9  Sensor Biasing Register (address = 08h) [reset = 00h]
        10. 9.6.1.10 System Control Register (address = 09h) [reset = 10h]
        11. 9.6.1.11 Offset Calibration Register 1 (address = 0Ah) [reset = 00h]
        12. 9.6.1.12 Offset Calibration Register 2 (address = 0Bh) [reset = 00h]
        13. 9.6.1.13 Offset Calibration Register 3 (address = 0Ch) [reset = 00h]
        14. 9.6.1.14 Gain Calibration Register 1 (address = 0Dh) [reset = 00h]
        15. 9.6.1.15 Gain Calibration Register 2 (address = 0Eh) [reset = 00h]
        16. 9.6.1.16 Gain Calibration Register 3 (address = 0Fh) [reset = 40h]
        17. 9.6.1.17 GPIO Data Register (address = 10h) [reset = 00h]
        18. 9.6.1.18 GPIO Configuration Register (address = 11h) [reset = 00h]
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Serial Interface Connections
      2. 10.1.2 Analog Input Filtering
      3. 10.1.3 External Reference and Ratiometric Measurements
      4. 10.1.4 Establishing a Proper Input Voltage
      5. 10.1.5 Unused Inputs and Outputs
      6. 10.1.6 Pseudo Code Example
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Register Settings
      3. 10.2.3 Application Curves
    3. 10.3 Do's and Don'ts
  11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
    2. 11.2 Power-Supply Sequencing
    3. 11.3 Power-On Reset
    4. 11.4 Power-Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 开发支持
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 相关链接
    4. 13.4 接收文档更新通知
    5. 13.5 社区资源
    6. 13.6 商标
    7. 13.7 静电放电警告
    8. 13.8 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Parameter Measurement Information

8.1 Noise Performance

Delta-sigma (ΔΣ) analog-to-digital converters (ADCs) are based on the principle of oversampling. The input signal of a ΔΣ ADC is sampled at a high frequency (modulator frequency) and subsequently filtered and decimated in the digital domain to yield a conversion result at the respective output data rate. The ratio between modulator frequency and output data rate is called the oversampling ratio (OSR). By increasing the OSR, and thus reducing the output data rate, the noise performance of the ADC can be optimized. In other words, the input-referred noise drops when reducing the output data rate because more samples of the internal modulator are averaged to yield one conversion result. Increasing the gain also reduces the input-referred noise, which is particularly useful when measuring low-level signals.

Table 1 to Table 4 summarize the device noise performance. Table 1 and Table 2 list the ADC measurement noise using the sinc3 digital filter at different data rates and different PGA settings, and Table 3 and Table 4 list the ADC measurement noise using the low-latency digital filter. Data are representative of typical noise performance at TA = 25°C using the internal 2.5-V reference. Data shown are based on 512 consecutive samples from a single device with inputs internally shorted. Table 1 and Table 3 list the input-referred root mean square noise in units of μVRMS for the conditions shown. Note that peak-to-peak (µVPP) values are shown in parentheses. Table 2 and Table 4 list the corresponding data in effective resolution calculated from μVRMS values using Equation 1. Noise-free resolution is calculated from µVPP values using Equation 2.

The input-referred noise (Table 1 and Table 3) only changes marginally when using an external low-noise reference, such as the REF5025. To calculate effective resolution and noise-free resolution when using a reference voltage other than 2.5 V, use Equation 1 and Equation 2:

Equation 1. Effective Resolution = ln[(2 · VREF / Gain) / VRMS-Noise] / ln(2)
Equation 2. Noise-Free Resolution= ln[(2 · VREF / Gain) / VPP-Noise] / ln(2)

Table 5 to Table 8 repeat the measurements of Table 1 to Table 4 but use the global chop feature of the device. The global chop feature averages two measurement of the ADC with the inputs swapped. This feature significantly reduces the input offset of the device, and reduces noise in the measurement.

Noise performance with the PGA bypassed are identical to the noise performance of the device with gain = 1 in Table 1 to Table 8.

Table 1. Noise in μVRMS (μVPP) with Sinc3 Filter,
at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled, Global Chop Disabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 0.32 (1.8) 0.16 (0.89) 0.085 (0.45) 0.049 (0.26) 0.036 (0.20) 0.025 (0.14) 0.020 (0.13) 0.019 (0.11)
5 0.40 (2.4) 0.21 (1.0) 0.11 (0.60) 0.066 (0.37) 0.040 (0.30) 0.033 (0.20) 0.029 (0.18) 0.027 (0.16)
10 0.53 (3.0) 0.29 (1.6) 0.16 (0.89) 0.088 (0.52) 0.061 (0.39) 0.046 (0.25) 0.040 (0.24) 0.036 (0.23)
16.6 0.76 (4.2) 0.36 (2.2) 0.20 (1.2) 0.11 (0.67) 0.077 (0.47) 0.060 (0.35) 0.052 (0.32) 0.046 (0.30)
20 0.81 (4.8) 0.41 (2.4) 0.22 (1.4) 0.12 (0.71) 0.082 (0.48) 0.064 (0.44) 0.056 (0.37) 0.048 (0.30)
50 1.3 (7.2) 0.62 (3.7) 0.33 (1.9) 0.18 (1.2) 0.13 (0.76) 0.11 (0.69) 0.091 (0.54) 0.080 (0.53)
60 1.4 (8.0) 0.70 (4.5) 0.37 (2.4) 0.21 (1.3) 0.12 (0.71) 0.11 (0.87) 0.10 (0.67) 0.089 (0.58)
100 1.8 (9.2) 0.91 (5.8) 0.49 (2.6) 0.27 (1.8) 0.17 (1.1) 0.14 (0.88) 0.12 (0.72) 0.11 (0.52)
200 2.4 (13) 1.2 (7.7) 0.64 (4.0) 0.39 (2.3) 0.26 (1.6) 0.21 (1.3) 0.19 (1.1) 0.15 (0.95)
400 3.6 (19) 1.8 (10) 0.87 (5.0) 0.54 (3.4) 0.34 (2.1) 0.28 (1.7) 0.25 (1.5) 0.22 (1.3)
800 5.0 (29) 2.6 (16) 1.3 (7.8) 0.76 (5.2) 0.49 (2.7) 0.41 (2.5) 0.37 (2.2) 0.34 (2.0)
1000 6.0 (32) 2.9 (17) 1.5 (10) 0.85 (5.2) 0.56 (3.2) 0.42 (2.5) 0.41 (2.3) 0.37 (2.2)
2000 7.8 (45) 4.2 (26) 2.1 (14) 1.2 (6.9) 0.78 (4.5) 0.64 (4.0) 0.57 (3.5) 0.54 (2.8)
4000 15. (95) 7.3 (45) 3.9 (25) 2.0 (11) 1.2 (7.1) 0.87 (5.2) 0.83 (5.1) 0.80 (5.0)

Table 2. Effective Resolution from RMS Noise (Noise-Free Resolution from Peak-to-Peak Noise)
with Sinc3 Filter at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled,
Global Chop Disabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 23.9 (21.4) 23.9 (21.4) 23.8 (21.4) 23.6 (21.2) 23.0 (20.5) 22.6 (20.2) 21.9 (19.1) 21.0 (18.4)
5 23.6 (21.0) 23.5 (21.2) 23.4 (21.0) 23.2 (20.7) 22.9 (20.0) 22.2 (19.5) 21.4 (18.9) 20.5 (17.6)
10 23.2 (20.7) 23.0 (20.5) 22.9 (20.4) 22.8 (20.2) 22.3 (19.6) 21.7 (19.2) 20.9 (18.4) 20.1 (17.3)
16.6 22.6 (20.2) 22.7 (20.1) 22.6 (20.0) 22.4 (19.8) 22.0 (19.4) 21.3 (18.8) 20.5 (17.9) 19.7 (17.0)
20 22.6 (20.0) 22.5 (20.0) 22.4 (19.8) 22.3 (19.8) 21.9 (19.3) 21.2 (18.4) 20.4 (17.7) 19.6 (17.0)
50 21.9 (19.4) 21.9 (19.4) 21.9 (19.3) 21.7 (19.0) 21.2 (18.6) 20.5 (17.8) 19.7 (17.2) 18.9 (16.2)
60 21.8 (19.2) 21.8 (19.1) 21.7 (19.0) 21.5 (18.8) 21.3 (18.8) 20.4 (17.5) 19.5 (16.8) 18.7 (16.0)
100 21.4 (19.0) 21.4 (18.7) 21.3 (18.9) 21.1 (18.4) 20.8 (18.1) 20.1 (17.4) 19.3 (16.7) 18.4 (16.0)
200 21.0 (18.6) 20.9 (18.3) 20.9 (18.2) 20.6 (18.1) 20.2 (17.6) 19.5 (16.9) 18.6 (16.1) 18.0 (15.3)
400 20.4 (18.0) 20.4 (17.9) 20.5 (17.9) 20.2 (17.5) 19.8 (17.2) 19.1 (16.5) 18.2 (15.7) 17.4 (14.9)
800 19.9 (17.4) 19.9 (17.2) 19.9 (17.3) 19.7 (16.9) 19.3 (16.8) 18.6 (16.0) 17.7 (15.1) 16.8 (14.3)
1000 19.7 (17.2) 19.7 (17.2) 19.6 (16.9) 19.5 (16.9) 19.1 (16.6) 18.5 (16.1) 17.6 (14.9) 16.7 (14.1)
2000 19.3 (16.8) 19.2 (16.6) 19.2 (16.5) 18.9 (16.5) 18.6 (16.1) 17.9 (15.3) 17.1 (14.4) 16.2 (13.8)
4000 18.4 (15.7) 18.4 (15.7) 18.3 (15.6) 18.3 (15.7) 18.0 (15.4) 17.5 (14.9) 16.5 (13.9) 15.6 (12.9)

Table 3. Noise in μVRMS (μVPP) with Low-Latency Filter,
at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled, Global Chop Disabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 0.46 (2.7) 0.24 (1.3) 0.12 (0.82) 0.072 (0.41) 0.051 (0.30) 0.041 (0.27) 0.037 (0.20) 0.034 (0.19)
5 0.62 (3.9) 0.33 (1.6) 0.18 (1.1) 0.10 (0.52) 0.064 (0.37) 0.053 (0.31) 0.050 (0.33) 0.046 (0.27)
10 0.94 (6.6) 0.47 (3.0) 0.24 (1.4) 0.14 (0.78) 0.09 (0.52) 0.074 (0.44) 0.065 (0.37) 0.057 (0.35)
16.6 1.3 (8.0) 0.66 (3.9) 0.32 (2.0) 0.18 (1.2) 0.12 (0.69) 0.10 (0.56) 0.086 (0.55) 0.079 (0.52)
20 1.2 (8.0) 0.65 (3.9) 0.34 (1.9) 0.20 (1.2) 0.13 (0.67) 0.10 (0.64) 0.093 (0.54) 0.082 (0.51)
50 2.1 (13) 1.0 (6.6) 0.54 (3.1) 0.30 (1.9) 0.22 (1.3) 0.16 (1.2) 0.15 (0.90) 0.13 (0.84)
60 2.3 (15) 1.2 (7.5) 0.62 (3.7) 0.35 (2.2) 0.22 (1.4) 0.19 (1.1) 0.16 (0.99) 0.15 (0.90)
100 2.8 (18) 1.6 (10) 0.83 (5.1) 0.45 (2.9) 0.30 (1.7) 0.23 (1.3) 0.38 (2.6) 0.20 (1.3)
200 4.6 (28) 2.2 (13) 1.1 (6.9) 0.67 (4.1) 0.42 (2.6) 0.34 (2.0) 0.29 (1.9) 0.28 (1.7)
400 6.1 (31) 3.0 (19) 1.6 (11) 0.92 (5.1) 0.46 (2.6) 0.48 (2.8) 0.42 (2.9) 0.39 (2.3)
800 8.6 (36) 4.3 (27) 2.3 (15) 1.3 (8.0) 0.81 (4.6) 0.66 (4.0) 0.58 (3.8) 0.55 (3.2)
1000 10 (50) 5.0 (29) 2.6 (15) 1.4 (8.9) 0.90 (5.4) 0.79 (5.1) 0.66 (4.3) 0.59 (3.8)
2000 22 (83) 11 (80) 5.5 (32) 2.9 (17) 1.6 (11) 1.1 (6.7) 1.1 (6.7) 1.0 (6.6)
4000 103 (629) 48 (404) 24 (160) 12 (70) 6.4 (39) 3.3 (21) 3.6 (20) 3.1 (19)

Table 4. Effective Resolution from RMS Noise (Noise-Free Resolution from Peak-to-Peak Noise)
with Low-Latency Filter, at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled,
Global Chop Disabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 23.4 (20.8) 23.3 (20.8) 23.3 (20.5) 23.0 (20.5) 22.6 (20.0) 21.9 (19.1) 21.1 (18.6) 20.0 (17.6)
5 22.9 (20.3) 22.8 (20.5) 22.7 (20.1) 22.6 (20.2) 22.2 (19.7) 21.5 (19.0) 20.6 (17.9) 19.7 (17.1)
10 22.3 (19.5) 22.3 (19.7) 22.3 (19.8) 22.1 (19.6) 21.7 (19.2) 21.0 (18.4) 20.2 (17.8) 19.4 (16.7)
16.6 21.9 (19.2) 21.9 (19.3) 21.9 (19.2) 21.7 (19.0) 21.3 (18.8) 20.5 (18.1) 19.8 (17.1) 18.9 (16.2)
20 22.0 (19.2) 21.9 (19.3) 21.8 (19.3) 21.6 (19.0) 21.3 (18.8) 20.5 (17.9) 19.7 (17.2) 18.9 (16.2)
50 21.2 (18.5) 21.2 (18.5) 21.1 (18.6) 21.0 (18.3) 20.5 (17.9) 19.9 (17.0) 19.0 (16.4) 18.2 (15.5)
60 21.0 (18.3) 21.0 (18.4) 21.0 (18.4) 20.8 (18.1) 20.4 (17.7) 19.7 (17.1) 18.9 (16.3) 18.0 (15.4)
100 20.8 (18.1) 20.6 (17.9) 20.5 (17.9) 20.4 (17.7) 20.0 (17.5) 19.4 (16.9) 17.6 (14.9) 17.6 (14.9)
200 20.1 (17.4) 20.1 (17.6) 20.1 (17.5) 19.8 (17.2) 19.5 (16.9) 18.8 (16.2) 18.0 (15.3) 17.1 (14.5)
400 19.6 (17.3) 19.7 (17.0) 19.6 (16.8) 19.4 (16.9) 19.4 (16.9) 18.3 (15.8) 17.5 (14.7) 16.6 (14.0)
800 19.2 (17.1) 19.1 (16.5) 19.0 (16.4) 18.9 (16.3) 18.6 (16.0) 17.9 (15.2) 17.0 (14.3) 16.1 (13.6)
1000 19.0 (16.6) 18.9 (16.4) 18.9 (16.3) 18.7 (16.1) 18.4 (15.8) 17.6 (14.9) 16.8 (14.2) 16.0 (13.3)
2000 17.8 (15.9) 17.8 (14.9) 17.8 (15.3) 17.7 (15.2) 17.5 (14.8) 17.1 (14.5) 16.1 (13.5) 15.2 (12.5)
4000 15.6 (13.0) 15.7 (12.6) 15.7 (12.9) 15.7 (13.1) 15.6 (13.0) 15.5 (12.9) 14.4 (11.9) 13.6 (11.0)

Table 5. Noise in μVRMS (μVPP) with Sinc3 Filter,
at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled, Global Chop Enabled, and Internal 2.5-V Reference

DATA RATE
(SPS)(1)		 GAIN
1 2 4 8 16 32 64 128
2.5 0.22 (1.2) 0.11 (0.60) 0.063 (0.30) 0.031 (0.19) 0.022 (0.15) 0.017 (0.09) 0.014 (0.08) 0.013 (0.07)
5 0.31 (1.8) 0.15 (0.70) 0.080 (0.52) 0.049 (0.26) 0.032 (0.19) 0.024 (0.15) 0.020 (0.12) 0.019 (0.11)
10 0.41 (2.4) 0.21 (1.2) 0.12 (0.60) 0.061 (0.37) 0.042 (0.24) 0.031 (0.20) 0.029 (0.17) 0.027 (0.16)
16.6 0.54 (3.3) 0.28 (1.5) 0.14 (0.80) 0.080 (0.48) 0.052 (0.32) 0.043 (0.26) 0.039 (0.23) 0.034 (0.20)
20 0.60 (3.3) 0.31 (1.8) 0.16 (0.80) 0.090 (0.56) 0.059 (0.34) 0.046 (0.25) 0.043 (0.27) 0.037 (0.19)
50 0.91 (4.8) 0.49 (2.5) 0.23 (1.3) 0.14 (0.90) 0.090 (0.45) 0.070 (0.41) 0.069 (0.36) 0.058 (0.33)
60 1.0 (5.7) 0.51 (3.1) 0.26 (1.5) 0.16 (0.90) 0.10 (0.54) 0.090 (0.45) 0.070 (0.41) 0.067 (0.40)
100 1.2 (6.9) 0.63 (3.7) 0.33 (1.7) 0.19 (1.0) 0.13 (0.70) 0.11 (0.59) 0.089 (0.52) 0.084 (0.49)
200 1.8 (10) 0.90 (4.9) 0.48 (2.8) 0.27 (1.4) 0.19 (1.1) 0.15 (0.80) 0.14 (0.80) 0.12 (0.75)
400 2.5 (14) 1.2 (7.0) 0.60 (3.4) 0.39 (2.4) 0.26 (1.6) 0.20 (1.1) 0.18 (1.0) 0.16 (0.90)
800 3.5 (21) 1.8 (11) 1.0 (5.7) 0.55 (3.2) 0.35 (2.1) 0.29 (1.7) 0.26 (1.4) 0.23 (1.3)
1000 3.9 (23) 2.1 (13) 1.1 (6.0) 0.65 (3.5) 0.39 (2.3) 0.32 (1.9) 0.28 (1.6) 0.26 (1.5)
2000 6.0 (35) 2.8 (16) 1.6 (8.0) 0.90 (5.0) 0.59 (3.5) 0.47 (2.5) 0.39 (2.2) 0.36 (2.1)
4000 10 (63) 5.3 (30) 2.8 (16) 1.4 (9.0) 0.90 (5.0) 0.67 (4.0) 0.58 (3.3) 0.54 (3.2)
(1) The actual data conversion period changes with the sinc3 filter and global chop mode enabled; see Table 19 for details.

Table 6. Effective Resolution from RMS Noise (Noise-Free Resolution from Peak-to-Peak Noise)
with Sinc3 Filter at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled,
Global Chop Enabled, and Internal 2.5-V Reference

DATA RATE
(SPS)(1)		 GAIN
1 2 4 8 16 32 64 128
2.5 24.4 (22.0) 24.5 (22.0) 24.2 (22.0) 24.3 (21.7) 23.7 (21.0) 23.1 (20.7) 22.4 (19.8) 21.5 (19.1)
5 24.0 (21.4) 24.0 (21.7) 23.9 (21.2) 23.6 (21.2) 23.2 (20.7) 22.6 (20.0) 21.9 (19.4) 20.9 (18.5)
10 23.5 (21.0) 23.5 (21.0) 23.3 (21.0) 23.3 (21.0) 22.8 (20.3) 22.2 (19.6) 21.4 (18.9) 20.5 (17.9)
16.6 23.1 (20.5) 23.1 (20.7) 23.1 (20.5) 22.8 (20.5) 22.5 (19.9) 21.8 (19.2) 20.9 (18.4) 20.1 (17.6)
20 23.0 (20.5) 22.9 (20.4) 22.9 (20.5) 22.7 (20.5) 22.3 (19.8) 21.7 (19.2) 20.8 (18.2) 20.0 (17.6)
50 22.4 (20.0) 22.3 (19.9) 22.4 (19.8) 22.1 (19.8) 21.8 (19.4) 21.1 (18.5) 20.1 (17.7) 19.4 (16.8)
60 22.3 (19.8) 22.2 (19.6) 22.2 (19.7) 21.9 (19.7) 21.6 (19.1) 20.8 (18.4) 20.0 (17.5) 19.2 (16.6)
100 22.0 (19.5) 21.9 (19.4) 21.8 (19.5) 21.6 (19.5) 21.2 (18.7) 20.5 (18.0) 19.7 (17.2) 18.8 (16.3)
200 21.4 (18.9) 21.5 (19.0) 21.3 (18.8) 21.1 (18.8) 20.7 (18.1) 20.0 (17.6) 19.1 (16.6) 18.3 (15.7)
400 21.0 (18.5) 20.9 (18.4) 21.0 (18.5) 20.6 (18.5) 20.2 (17.6) 19.6 (17.1) 18.7 (16.1) 17.9 (15.4)
800 20.4 (17.9) 20.4 (17.8) 20.3 (17.7) 20.1 (17.7) 19.8 (17.2) 19.0 (16.5) 18.2 (15.7) 17.4 (14.9)
1000 20.3 (17.7) 20.2 (17.6) 20.1 (17.7) 19.9 (17.7) 19.6 (17.0) 18.9 (16.3) 18.1 (15.6) 17.2 (14.7)
2000 19.7 (17.1) 19.8 (17.2) 19.6 (17.2) 19.4 (17.2) 19.0 (16.5) 18.3 (15.9) 17.6 (15.2) 16.7 (14.2)
4000 19.0 (16.3) 18.9 (16.4) 18.8 (16.2) 18.7 (16.2) 18.4 (15.9) 17.8 (15.3) 17.0 (14.5) 16.1 (13.6)
(1) The actual data conversion period changes with the sinc3 filter and global chop mode enabled; see Table 19 for details.

Table 7. Noise in μVRMS (μVPP) with Low-Latency Filter,
at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled, Global Chop Enabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 0.34 (2.1) 0.16 (0.90) 0.09 (0.52) 0.051 (0.26) 0.034 (0.17) 0.027 (0.15) 0.024 (0.14) 0.021 (0.13)
5 0.47 (2.7) 0.22 (1.3) 0.12 (0.60) 0.076 (0.45) 0.038 (0.22) 0.039 (0.23) 0.034 (0.20) 0.029 (0.19)
10 0.63 (3.6) 0.33 (1.8) 0.18 (1.0) 0.10 (0.56) 0.069 (0.37) 0.051 (0.30) 0.045 (0.26) 0.041 (0.25)
16.6 0.90 (4.5) 0.43 (2.5) 0.24 (1.4) 0.14 (0.90) 0.090 (0.50) 0.070 (0.40) 0.065 (0.38) 0.056 (0.35)
20 0.90 (5.1) 0.42 (2.5) 0.23 (1.4) 0.14 (0.90) 0.090 (0.63) 0.070 (0.41) 0.070 (0.39) 0.059 (0.36)
50 1.3 (8.0) 0.80 (4.6) 0.39 (2.5) 0.23 (1.2) 0.14 (0.90) 0.12 (0.70) 0.11 (0.61) 0.090 (0.50)
60 1.7 (10) 0.80 (4.3) 0.42 (2.8) 0.23 (1.4) 0.18 (1.0) 0.13 (0.70) 0.12 (0.69) 0.11 (0.67)
100 2.0 (12) 1.1 (6.0) 0.55 (3.2) 0.34 (1.9) 0.21 (1.3) 0.18 (1.1) 0.16 (0.90) 0.14 (0.80)
200 3.0 (17) 1.5 (8.0) 0.70 (4.1) 0.48 (2.9) 0.28 (1.7) 0.26 (1.4) 0.23 (1.3) 0.19 (1.0)
400 4.3 (22) 2.3 (13) 1.1 (6.0) 0.64 (3.7) 0.44 (2.4) 0.33 (1.9) 0.29 (1.8) 0.28 (1.7)
800 6.2 (25) 3.1 (19) 1.5 (9.0) 0.90 (5.0) 0.62 (3.4) 0.49 (2.8) 0.45 (2.5) 0.40 (2.3)
1000 6.0 (38) 3.3 (19) 1.8 (11) 1.1 (6.3) 0.66 (3.7) 0.52 (2.8) 0.45 (2.7) 0.45 (2.5)
2000 15 (51) 8.0 (50) 4.0 (23) 2.2 (13) 1.2 (7.0) 0.90 (5.2) 0.80 (5.6) 0.70 (3.9)
4000 65 (275) 35 (211) 18 (116) 9.0 (51) 4.4 (24) 2.3 (15) 2.4 (13) 2.2 (12)

Table 8. Effective Resolution from RMS Noise (Noise-Free Resolution from Peak-to-Peak Noise)
with Low-Latency Filter, at AVDD = 3.3 V, AVSS = 0 V, PGA Enabled,
Global Chop Enabled, and Internal 2.5-V Reference

DATA RATE
(SPS)		 GAIN
1 2 4 8 16 32 64 128
2.5 23.8 (21.2) 23.9 (21.4) 23.7 (21.2) 23.5 (21.2) 23.1 (20.8) 22.5 (20.0) 21.7 (19.1) 20.8 (18.2)
5 23.3 (20.8) 23.4 (20.8) 23.3 (21.0) 23.0 (20.4) 23.0 (20.4) 21.9 (19.4) 21.1 (18.6) 20.4 (17.7)
10 22.9 (20.4) 22.9 (20.4) 22.7 (20.3) 22.6 (20.1) 22.1 (19.7) 21.6 (19.9) 20.7 (18.2) 19.9 (17.2)
16.6 22.4 (20.1) 22.5 (19.9) 22.3 (19.8) 22.1 (19.4) 21.8 (19.2) 21.1 (18.6) 20.2 (17.6) 19.4 (16.8)
20 22.4 (19.9) 22.5 (19.9) 22.4 (19.8) 22.1 (19.4) 21.8 (18.9) 21.0 (18.6) 20.1 (17.8) 19.3 (16.7)
50 21.8 (19.3) 21.7 (19.0) 21.6 (19.0) 21.4 (19.0) 21.0 (18.4) 20.4 (17.8) 19.4 (17.0) 18.7 (16.3)
60 21.5 (19.0) 21.6 (19.1) 21.5 (18.8) 21.3 (18.8) 20.8 (18.3) 20.2 (17.7) 19.3 (16.8) 18.5 (15.8)
100 21.2 (18.6) 21.1 (18.6) 21.1 (18.6) 20.8 (18.3) 20.5 (17.9) 19.7 (17.1) 18.9 (16.4) 18.1 (15.6)
200 20.7 (18.2) 20.7 (18.2) 20.7 (18.2) 20.3 (17.7) 20.1 (17.5) 19.2 (16.8) 18.4 (15.9) 17.6 (15.2)
400 20.1 (17.8) 20.1 (17.6) 20.1 (17.6) 19.9 (17.4) 19.4 (17.0) 18.8 (16.4) 18.0 (15.4) 17.1 (14.5)
800 19.6 (17.6) 19.6 (17.0) 19.7 (17.1) 19.4 (16.8) 18.9 (16.5) 18.3 (15.8) 17.4 (14.9) 16.6 (14.0)
1000 19.6 (17.0) 19.5 (17.0) 19.4 (16.8) 19.1 (16.6) 18.9 (16.4) 18.2 (15.8) 17.4 (14.8) 16.4 (13.9)
2000 18.4 (16.6) 18.2 (15.6) 18.2 (15.7) 18.1 (15.6) 18.0 (15.4) 17.4 (14.9) 16.6 (13.8) 15.9 (13.3)
4000 16.2 (14.1) 16.1 (13.5) 16.1 (13.4) 16.1 (13.6) 16.1 (13.7) 16.1 (13.4) 15.0 (12.7) 14.1 (11.5)
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |