ZHCSJY1A June 2019 – January 2021 ADS125H01
PRODUCTION DATA
The PGA requires operating voltage headroom at the input and output nodes. The operating headroom must be maintained; otherwise the conversion data may not be valid. Use the internal PGA monitors to detect PGA out-of-range conditions. The PGA has four monitors (two monitors for the input and two monitors for the output) with high and low thresholds for each, for a total of eight possible alarms. The status of each PGA monitor is read in the STATUS1 register. The PGA monitoring points are illustrated in Figure 9-1. Figure 9-4 shows the operation of the high and low thresholds of each of the four PGA monitors.
Detect PGA out-of-range operating conditions by polling the STAT12 bit (bit 4 of the STATUS conversion byte or STATUS0 register). The STAT12 bit is the logical OR of all PGA error flags with the CRC2 error flag. When the STAT12 bit asserts, poll the STATUS1 and STATUS2 registers (address 11h and 12h) to determine the source of the STAT12 error. The PGA out-of-range flags latch in the STATUS1 register and remain latched after the overload condition is removed. Read the STATUS1 register to clear the PGA out-of-range bits (clear-on-read operation). The PGA overload flags and the CRC2 flag must be reset in order for the STAT12 bit to clear. See the STATUS1 register for a description of the PGA overload bits.
The PGA monitors are analog comparators that respond to transient out-of-range conditions.