Conversions are synchronized and controlled by the START pin or, optionally, through SPI operation. If controlling conversions through SPI operation, keep the START pin low to avoid contention with the pin. Writing to any register from 04h through 0Eh causes the conversion to restart, thus resulting in loss of synchronization. Resynchronization of the ADC may be necessary in this case.

The ADC has three modes to synchronize and control conversions: synchronized, start/stop, and one-shot modes, each with specific functionalities. Program the selected mode of synchronization by the START_MODE[1:0] bits of the CONFIG2 register. Only the start/stop and one-shot control modes can be controlled through SPI operation.

After the ADC is synchronized, the first conversion is fully settled data but incurs a delay (latency time) compared to the normal data period. This latency is needed to account for full settling of the digital filter. The latency time depends on the data rate and the filter mode (see the Section 8.3.5 section for filter latency details).