ZHCSIU4A September   2018  – August 2019 ADS1284

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Noise Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs and Multiplexer
      2. 8.3.2 Programmable Gain Amplifier (PGA)
      3. 8.3.3 Analog-to-Digital Converter (ADC)
        1. 8.3.3.1 Modulator
          1. 8.3.3.1.1 Modulator Overrange
          2. 8.3.3.1.2 Modulator Input Impedance
          3. 8.3.3.1.3 Modulator Overrange Detection (MFLAG)
          4. 8.3.3.1.4 Offset
          5. 8.3.3.1.5 Voltage Reference Inputs (VREFP, VREFN)
        2. 8.3.3.2 Digital Filter
          1. 8.3.3.2.1 Sinc Filter Section (sinx / x)
          2. 8.3.3.2.2 FIR Section
          3. 8.3.3.2.3 Group Delay and Step Response
            1. 8.3.3.2.3.1 Linear Phase Response
            2. 8.3.3.2.3.2 Minimum Phase Response
          4. 8.3.3.2.4 HPF Section
    4. 8.4 Device Functional Modes
      1. 8.4.1  Synchronization (SYNC PIN and SYNC Command)
        1. 8.4.1.1 Pulse-Sync Mode
        2. 8.4.1.2 Continuous-Sync Mode
      2. 8.4.2  Reset (RESET Pin and Reset Command)
      3. 8.4.3  Master Clock Input (CLK)
      4. 8.4.4  Power-Down (PWDN Pin and STANDBY Command)
      5. 8.4.5  Power-On Sequence
      6. 8.4.6  DVDD Power Supply
      7. 8.4.7  Serial Interface
        1. 8.4.7.1 Chip Select (CS)
        2. 8.4.7.2 Serial Clock (SCLK)
        3. 8.4.7.3 Data Input (DIN)
        4. 8.4.7.4 Data Output (DOUT)
        5. 8.4.7.5 Serial Port Auto Timeout
        6. 8.4.7.6 Data Ready (DRDY)
      8. 8.4.8  Data Format
      9. 8.4.9  Reading Data
        1. 8.4.9.1 Read-Data-Continuous Mode
        2. 8.4.9.2 Read-Data-By-Command Mode
      10. 8.4.10 One-Shot Operation
      11. 8.4.11 Offset and Full-Scale Calibration Registers
        1. 8.4.11.1 OFC[2:0] Registers
        2. 8.4.11.2 FSC[2:0] Registers
      12. 8.4.12 Calibration Commands (OFSCAL and GANCAL)
        1. 8.4.12.1 OFSCAL Command
        2. 8.4.12.2 GANCAL Command
      13. 8.4.13 User Calibration
    5. 8.5 Programming
      1. 8.5.1 Commands
        1. 8.5.1.1  SDATAC Requirements
        2. 8.5.1.2  WAKEUP: Wake-Up From Standby Mode
        3. 8.5.1.3  STANDBY: Standby Mode
        4. 8.5.1.4  SYNC: Synchronize the Analog-to-Digital Conversion
        5. 8.5.1.5  RESET: Reset the Device
        6. 8.5.1.6  RDATAC: Read Data Continuous
        7. 8.5.1.7  SDATAC: Stop Read Data Continuous
        8. 8.5.1.8  RDATA: Read Data by Command
        9. 8.5.1.9  RREG: Read Register Data
        10. 8.5.1.10 WREG: Write to Register
        11. 8.5.1.11 OFSCAL: Offset Calibration
        12. 8.5.1.12 GANCAL: Gain Calibration
    6. 8.6 Register Maps
      1. 8.6.1 Register Descriptions
        1. 8.6.1.1 ID_CFG: ID_Configuration Register (address = 00h) [reset =x0h]
        2. 8.6.1.2 CONFIG0: Configuration Register 0 (address = 01h) [reset = 52h]
        3. 8.6.1.3 CONFIG1: Configuration Register 1 (address = 02h) [reset = 08h]
        4. 8.6.1.4 HPF0 and HPF1 Registers
          1. 8.6.1.4.1 HPF0: High-Pass Filter Corner Frequency, Low Byte (address = 03h) [reset = 32h]
          2. 8.6.1.4.2 HPF1: High-Pass Filter Corner Frequency, High Byte (address = 04h) [reset = 03h]
        5. 8.6.1.5 OFC0, OFC1, OFC2 Registers
          1. 8.6.1.5.1 OFC0: Offset Calibration, Low Byte (address = 05h) [reset = 00h]
          2. 8.6.1.5.2 OFC1: Offset Calibration, Mid Byte (address = 06h) [reset = 00h]
          3. 8.6.1.5.3 OFC2: Offset Calibration, High Byte (address = 07h) [reset = 00h]
        6. 8.6.1.6 FSC0, FSC1, FSC2 Registers
          1. 8.6.1.6.1 FSC0: Full-Scale Calibration, Low Byte (address = 08h) [reset = 00h]
          2. 8.6.1.6.2 FSC1: Full-Scale Calibration, Mid Byte (address = 09h) [reset = 00h]
          3. 8.6.1.6.3 FSC2: Full-Scale Calibration, High Byte (address = 0Ah) [reset = 40h]
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Geophone Interface
      2. 9.2.2 Digital Interface
    3. 9.3 Initialization Set Up
  10. 10器件和文档支持
    1. 10.1 接收文档更新通知
    2. 10.2 社区资源
    3. 10.3 商标
    4. 10.4 静电放电警告
    5. 10.5 Glossary
  11. 11机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.1 Noise Performance

The ADS1284 offers outstanding signal-to-noise ratio (SNR). SNR depends on data rate, gain and mode of operation (high resolution or low power). As the bandwidth is reduced by decreasing the data rate, SNR improves correspondingly. Similarly, as gain is increased, the input-referred noise decreases. The low power mode decreases the oversampling ratio of the modulator and reduces the bias current of the PGA. As a consequence, low-power mode reduces the operating power but also results in increased conversion noise. The ADC incorporates a chop mode to remove 1/f noise from the PGA. Chop mode results in increased input current and as a result, chop mode may not be compatible with certain types of hydrophone sensors.

Input-referred noise is related to SNR by Equation 1:

Equation 1. ADS1284 q_snr_20log_bas418.gif

where

  • FSRRMS = Full-scale range RMS = VREF / (2 × √2 × PGA)
  • NRMS = Noise (RMS, input-referred)

Table 1 summarizes SNR and input-referred noise performance in low-power mode (chop enabled). Table 2 summarizes SNR and input-referred noise performance in low-power mode (chop disabled).

Table 1. Low-Power Mode SNR (dB) and Input Referred Noise (µVRMS), Chop Enabled

DATA RATE (SPS) PGA (SNR, dB)(1) PGA (Input-Referred Noise, µV RMS)
1 2 4 8 16 32 64 1 2 4 8 16 32 64
250 127 127 126 124 122 116 111 0.79 0.41 0.22 0.14 0.09 0.09 0.08
500 124 124 123 121 119 113 108 1.13 0.58 0.31 0.19 0.13 0.12 0.11
1000 121 121 120 118 116 110 105 1.60 0.82 0.44 0.27 0.18 0.17 0.16
2000 118 118 117 115 113 107 102 2.27 1.16 0.63 0.39 0.26 0.24 0.22
4000 115 114 114 112 110 104 99 3.27 1.68 0.90 0.56 0.37 0.34 0.32
(1) Typical values at TA = 25°C. SNR data rounded to the nearest dB. Measurement bandwidth: 0.1 Hz to 0.413 × data rate.

Table 2. Low-Power Mode SNR (dB) and Input Referred Noise (µVRMS), Chop Disabled

DATA RATE (SPS) PGA (SNR, dB)(1) PGA (Input-Referred Noise, µV RMS)
1 2 4 8 16 32 64 1 2 4 8 16 32 64
250 127 126 122 119 114 107 102 0.82 0.47 0.34 0.25 0.22 0.24 0.23
500 124 123 121 117 113 107 101 1.16 0.63 0.38 0.30 0.25 0.25 0.25
1000 121 120 119 116 112 106 100 1.61 0.85 0.50 0.37 0.29 0.29 0.27
2000 118 118 116 114 110 104 99 2.28 1.19 0.68 0.47 0.35 0.35 0.32
4000 115 114 114 111 108 102 97 3.29 1.70 0.94 0.62 0.43 0.43 0.40
(1) Typical values at TA = 25°C. SNR data rounded to the nearest dB. Measurement bandwidth: 0.1 Hz to 0.413 × data rate.

Table 3 summarizes SNR and input-referred noise performance in high-resolution mode (chop enabled). Table 4 summarizes SNR and input-referred noise performance in high-resolution mode (chop disabled).

Table 3. High-Resolution Mode SNR (dB) and Input Referred Noise (µVRMS), Chop Enabled

DATA RATE (SPS) PGA (SNR, dB)(1) PGA (Input-Referred Noise, µV RMS)
1 2 4 8 16 32 64 1 2 4 8 16 32 64
250 130 129 129 127 125 119 114 0.59 0.30 0.16 0.10 0.07 0.06 0.06
500 127 126 126 124 122 116 111 0.84 0.43 0.23 0.14 0.09 0.09 0.08
1000 124 123 123 121 119 113 108 1.19 0.60 0.32 0.20 0.13 0.12 0.11
2000 121 120 120 118 116 110 105 1.68 0.86 0.46 0.28 0.18 0.17 0.16
4000 117 117 117 115 113 107 102 2.40 1.22 0.66 0.40 0.26 0.25 0.23

Table 4. High-Resolution Mode SNR (dB) and Input Noise (µVRMS), Chop Disabled

DATA RATE (SPS) PGA (SNR, dB)(1) PGA (Input-Referred Noise, µV RMS)
1 2 4 8 16 32 64 1 2 4 8 16 32 64
250 129 128 125 120 116 110 104 0.63 0.37 0.26 0.21 0.18 0.17 0.18
500 126 125 123 119 114 108 103 0.87 0.47 0.31 0.25 0.21 0.21 0.20
1000 123 123 121 117 114 108 102 1.20 0.65 0.39 0.30 0.22 0.22 0.22
2000 120 120 119 116 112 107 101 1.69 0.91 0.51 0.37 0.26 0.25 0.25
4000 117 117 116 114 111 105 99 2.41 1.24 0.70 0.46 0.33 0.31 0.30
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |