ZHCSIU4A September 2018 – August 2019 ADS1284
PRODUCTION DATA.
The digital filter receives the modulator output data stream and decimates and filters the data. By adjusting the amount of filtering, tradeoffs can be made between resolution and data rate: filter more for higher resolution, filter less for higher data rate.
The digital filter is comprised of three filter sections: a variable-decimation, fifth-order sinc filter; a fixed-decimation FIR, low-pass filter (LPF) with selectable phase; and a programmable, first-order, high-pass filter (HPF), as shown in Figure 43.
The output can be taken from one of the three filter sections, as Figure 43 shows. For partial filtering of the conversion data, select the sinc filter mode. The sinc filter mode is intended for use in conjunction with an external FIR filter. For complete on-chip filtering, select the sinc + FIR mode. With sinc + FIR filter mode active, the HPF can be included to remove dc and low frequencies from the data. Table 8 shows the filter mode options.
FILTR[1:0] BITS | DIGITAL FILTER MODE |
---|---|
00 | Reserved (not used) |
01 | Sinc |
10 | Sinc + FIR |
11 | Sinc + FIR + HPF |