ZHCSIU4A September 2018 – August 2019 ADS1284
PRODUCTION DATA.
Power-down the ADS1284 in two ways: take the PWDN pin low, or send a STANDBY command. When the PWDN pin is pulled low, the internal circuitry is disabled to minimize power and the contents of the register settings are reset.
When in the power-down state, the device outputs remain active and the device inputs must not float. When the STANDBY command is sent, the SPI port and the configuration registers are kept active. Figure 56 and Table 17 show the timing. Standby mode is cancelled when CS is taken high.
PARAMETER | FILTER MODE | ||
---|---|---|---|
tDR | Time for data ready 216 CLK cycles after power-on;
and new data ready after PWDN pin or WAKEUP command |
See Table 15 | SINC(1) |
62.98046875 / fDATA + 468 / fCLK(2) | FIR |