The continuous-sync mode offers the option of accepting a continuous clock signal to the SYNC pin. The ADC compares the period of the SYNC clock signal to N periods of the DRDY signal to qualify resynchronization. Initially, the first SYNC positive edge synchronizes the ADC. Resynchronization occurs only when the time period between rising edges of SYNC over N multiple DRDY periods differ by at least ± one f_CLK cycle, where N = 1, 2, 3 and so on. Otherwise, the SYNC clock period is in synchronization with the existing DRDY pulses, so no resynchronization occurs. Be aware the continuous sync mode cannot be used when the sample rate converter is enabled.

After synchronization, DRDY continues to pulse; however, data are held low for 63 data periods to allow for the digital filter to settle. See Figure 6-4 for the DRDY behavior. Because of the initial delay of the digital filter, the SYNC input signal and the DRDY pulses exhibit an offset time. The offset time is a function of the data rate.