ZHCSQZ8A May 2022 – December 2022 ADS1285
PRODUCTION DATA
The ADC has three analog power supplies, AVDD1, AVDD2, and AVSS, all of which must be well regulated and free from switching power-supply noise (voltage ripple < 1 mV). The AVDD1 power-supply voltage is relative to AVSS and powers the PGA and buffer. AVSS is the negative power supply. The ADC can be configured for single-supply operation with AVDD1 = 5 V or 3.3 V with AVSS connected to ground. Because the minimum voltage of AVDD1 to AGND = 2.375 V, dual-supply operation is only possible when AVDD1 – AVSS = ±2.5 V. Single-power supply operation requires a level-shift voltage at the geophone input through the input termination resistors. The level-shift voltage is typically equal to AVDD1 / 2. Bypass AVDD1 with 1-μF and 0.1-μF parallel capacitors to AVSS.
The AVDD2 power supply powers the modulator. To simplify system power management, AVDD2 can be connected AVDD1, regardless whether AVDD1 and AVSS are configured for single- or dual-supply operation (AVDD2 voltage range is 2.375 V to 5.25 V with respect to AGND). Bypass AVDD2 with 1-μF and 0.1-μF parallel capacitors to AGND.